Mentor.com :: IC Design Resources

News Article:Mentor Graphics Teams with OpSIS Foundries and Lumerical Solutions on PDK Development for IME Silicon Photonics Process

Wed, 22 May 2013 13:00:00 GMT

WILSONVILLE, Ore., May 22, 2013—Mentor Graphics Corp., a leader in electronic design automation, today announced it has teamed with OpSIS and Lumerical Solutions to develop a complete EDA-style, full flow process design kit (PDK) for the OpSIS IME (Institute of Microelectronics) silicon photonics process.

News Article:Mentor Graphics Pyxis Platform and PDK Automation Process Adopted by MagnaChip Semiconductor

Tue, 14 May 2013 13:00:00 GMT

WILSONVILLE, Ore., May 14, 2013 — Mentor Graphics Corp. (NASDAQ: MENT), a leader in electronic design automation, today announced that MagnaChip Semiconductor Corporation (“MagnaChip”) has adopted the Pyxis® custom IC design platform and the Mentor® process design kit (PDK) automation process. MagnaChip is a leading designer and manufacturer of analog and mixed-signal semiconductor products for high-volume consumer applications.

Technology Overview:How to select specific rule checks for a Calibre DRC run

Mon, 13 May 2013 16:00:00 GMT

This video shows you how to create specific rule check recipes for running DRC in Calibre Interactive. Rule check recipes allow you to configure and reuse specific rule checks such as metal, density, and antenna checks across multiple Calibre DRC jobs. This will reduce the runtime for your Calibre DRC jobs and allows you to focus on the Calibre DRC results that you want to fix.

Technology Overview:How to find cell-references using DESIGNrev

Mon, 13 May 2013 07:00:00 GMT

This video shows how to quickly and easily find the cell references. The results can be filtered by hierarchy so you can get the results that you are interested in.

Technology Overview:How to turn DESIGNrev command-line script into a GUI-menu based Macro

Mon, 13 May 2013 07:00:00 GMT

If you want to introduce your script to your co-worker to use, the best way is to make it accessible from GUI menu. So your co-worker can recognize and click the menu item to launch the script, instead of memorizing the name and typing in the command line. You can convert your command-line based script to a GUI-based script in a few minutes by following a few simple steps described in this video.

Technology Overview:How to cross-probe nets in the design environment using Calibre RVE

Mon, 13 May 2013 07:00:00 GMT

This video shows how to use Calibre RVE to trace and highlight the nets in the Cadence Virtuoso design-environment. Nets which are not output in Calibre LVS report can also be traced and highlighted using Calibre RVE just by a single mouse-click in the design-environment. The tracing of nets is also available in Synopsys Laker, Calibre DESIGNrev and other design environments into which Calibre is integrated.

Technology Overview:How to Generate XOR rules for GDS and Oasis input databases

Thu, 02 May 2013 16:00:00 GMT

How to generate Calibre XOR Rules for Oasis and GDS database Compare Overview: Generating Calibre XOR rules for input databases when the input layers are not known can be time consuming. This video demonstrates how to generate Calibre SVRF XOR rules to compare GDS and Oasis databases. Abstract: When translating layout data from one format to another or validating expected vs. unexpected changes during database manipulation, it is helpful to run XOR. However, XOR rules for your specific example may not be available. The Calibre DBdiff database compare utility can be used to generate suitable rules with only the input databases and top cell name as inputs.

• Run Command line DBdiff to generate Calibre XOR rules

• Run Calibre Fast XOR database comparison on Oasis and GDS databases

• Enable automatic XOR rule generation for Calibre Interactive

• Launch Calibre Interactive FastXOR from the layout viewer

Event:Mentor Forum for Custom IC Design & Mixed Signal IC Verification

Tue, 30 Apr 2013 07:00:00 GMT

Continued learning is a key feature of life for high-tech engineers. Mentor Forum’s provide education for customers and prospective customers on a wide range of electronic design automation technologies and solutions. Importantly they also provide opportunity for members of the electronic design community to meet experts and peers; to share ideas and discuss challenges; to network.

Technology Overview:How to quickly merge GDSII / OASIS files

Mon, 29 Apr 2013 16:00:00 GMT

Streaming out and merging the design using P&R tool takes a long time, Calibre DESIGNrev can help you to quickly and easily merge the IP cell library in the top-level P&R design using one DESIGNrev Tcl command line.

Technology Overview:How to display RVE Highlight Layers as a Rulecheck in Calibre DESIGNrev

Thu, 18 Apr 2013 16:00:00 GMT

Calibre RVE highlight layers are added to Calibre DESIGNrev with the common name “rve” so a rulecheck associated with a result needs to be referenced from the RVE results window. It would be very useful if the results were named as the rulecheck that was violated.