Flexible Technology for Mixed-Signal SoC Verification
Functional verification of digital SoC's use structured testbench methodologies, automated stimulus generation and coverage metrics. The verification of Mixed-Signal SoC's is even more challenging through the addition of RF/analogue functions and macro-blocks.
This Tech Talk will discuss the evolution of digital SoC verification methodology and look at how analog verification can plug into and take advantage of new techniques. It will cover the various verification options available when pulling mixed-signal SoCs blocks together and the benefits and weaknesses of each.
What You Will Learn
- The tradeoffs necessary to achieve adequate coverage in reasonable time in mixed-signal SoC verification. - The features and functions of a mixed-signal environment that are necessary for a flexible verification strategy.
About the Presenter
Marius is a Product Specialist for Analogue and Mixed Signal solutions. His responsibilities include supporting major customers in the area of RF and analog-mixed signal design and verification, across Europe. He brings over 20 years of experience in design and EDA.
Prior to joining Mentor Graphics, Marius worked with Anacad Design systems in Germany in the areas of analogue behavioral modeling, design optimization and design centering and at IIRUC in Romania, in the HW test laboratory.
Marius hold a Master of Electronics and Telecommunications from the Polytechnical Institute Timisoara, Romania.
Who Should View
- System engineers performing verification of mixed analog and digital systems
- Project leaders of mixed-signal designs concerned about design complexity and how to reduce risk with an appropriate verification strategy
- Analog design engineers who create IP for mixed signal ICs and digital design engineers who are seeing analog portions entering their designs
- CAD managers responsible for mixed-signal design and verification tools