Calibre xRC for Memory Designs
On-demand Web Seminar
As a Calibre xRC customer, you demand excellence in your EDA software. That’s why we’d like you to be the first to know about the new memory extraction capabilities of Calibre xRC. Memory designs require a powerful parasitic extraction tool with the capacity and performance to handle large complex designs, the accuracy to predict actual silicon results and seamless integration into preferred design and analysis environments.
This presentation is 18 minutes in duration.
Atmel Uses Calibre to Increase Yield and Reduces Time-to-Market
Calibre helped cut time-to-market by up to 10X and provided significant savings in wasted mask and silicon creation costs.
An Innovative Approach to High Frequency Analysis of IC Layouts
Traditional high frequency analysis (HFA) of integrated circuit designs is based on an empirical approach, which is slow and cumbersome. It is costly to develop the initial model for an IC process, and...
Calibre xRC Extraction
Learn more about Calibre xRC for ASIC, Memory, Analogy, RF and Mixed-Signal Flows.