IC Nanometer Design News & Industry Articles
Press Releases
IC Design Press Releases
- Freescale Semiconductor Collaborates with Mentor Graphics on Tessent Silicon Test, Yield Analysis, Calibre Physical Verification and DFM (Jan 11, 2010)
- Juniper Networks Completes World’s First Network Instruction Set Processor Design Using Mentor Graphics Calibre and Design-for-Test Solutions (Nov 3, 2009)
- Mentor Graphics Analog/mixed-signal Simulators Enable Widex to Verify Wireless Chip for New Clear440 Product (Oct 27, 2009)
- TSMC Selects Calibre Physical Verification Platform for Integrated Sign-off Flow (Oct 22, 2009)
- GLOBALFOUNDRIES Selects Mentor Graphics Calibre Platform for Computational Lithography and DFM Enablement (Oct 16, 2009)
- Mentor Graphics Provides Comprehensive Low Power Solution in TSMC Reference Flow 10.0 (Sep 21, 2009)
- Mentor Graphics Underscores Low-Power Strategy with Vista Architecture-Level Power Solution (Jul 27, 2009)
- Mentor Graphics Provides Support for TSMC iPDKs (Jul 23, 2009)
Press Release Archives
Industry Articles
- Pravin Madhani, GM Place & Route Division, talks shop with John Donovan of Low-Power Design (Sep 22, 2009)
- SoC and Analog/Mixed Signal Challenges - EDACafe DAC Video Interview (Sep 14, 2009)
- Pravin Madhani speaks to Graham Bell about what’s new with Olympus-SoC (Aug 12, 2009)
- IPL Alliance Announces 3rd Annual Lunch Workshop at DAC on Tuesday, July 28, 2009 (Jul 16, 2009)
- The Design and Verification Challenge for the Next Decade (Jun 30, 2009)
- The Mixed Signal Challenge (Jun 30, 2009)
- Olympus-SoC Place-and-Route Platform Adds Advanced Low-Power Features (Apr 6, 2009)
- DFM Moves From Hype To Reality - System-Level Design (Feb 5, 2009)
- Mentor’s new DRC tool targets 32-nm node (Dec 5, 2008)
- Connecting design and fabrication (Dec 3, 2008)
- Articles Archives