December 2008
Mentor Graphics Olympus-SoC Place-and-Route System Qualifies for TSMC 40nm Processes Dec 11, 2008
November 2008
NEC Electronics Selects Mentor Graphics Calibre nmLVS for Advanced Circuit Characterization at 40nm and Below Nov 13, 2008
Mentor Graphics Boosts Eldo Simulator Performance with Generalized Multi-threading Technology Nov 4, 2008
October 2008
Mentor Graphics Olympus-SoC Place-and-Route System Slashes Design Closure Times with Industry’s First Parallel Timing Analysis and Optimization Technology Oct 13, 2008
TSMC Adopts Mentor Graphics Calibre Equation-Based DRC Feature for Advanced Physical Verification Oct 7, 2008
September 2008
IBM and Mentor Graphics to Develop 22nm Computational Lithography Solution for the Integrated Circuit Industry Sep 17, 2008
August 2008
Mentor Graphics Eldo Adopted by TSMC for Cell Library Characterization of 40 Nanometer Technology Node Aug 12, 2008
June 2008
Mentor Graphics Outlines IC Implementation Strategy to Address Sub-45nm Challenges Jun 9, 2008
May 2008
Mentor Graphics Qualifies Calibre Model-based Planarity Flow for TSMC’s 65 and 40 nanometer IC Manufacturing Processes May 29, 2008
Mentor Graphics Calibre LFD selected by STMicroelectronics for Litho Variability Analysis at 65 and 45 Nanometers May 23, 2008
Toshiba Selects Mentor Graphics Calibre DFM Platform for its Device Extraction Flow May 19, 2008
Mentor Graphics Acquires Assets of Ponte Solutions—Technology to be Integrated into Calibre DFM Solutions May 15, 2008
Mentor Graphics Aligns Product Groups to Address IC Implementation Challenges at 45nm and Beyond May 7, 2008
April 2008
Mentor Graphics Aligns with UMC to Validate the Accuracy of Calibre nmDRC Physical Verification UMC 65nm Deck Apr 29, 2008
March 2008
STARC Establishes Variation-and-Yield-Aware Design Methodology using Mentor Graphics Calibre LFD Mar 26, 2008