IC Nanometer Design Industry Articles

2008

TSMC Adopts Mentor Graphics Eldo Analog Simulation Tool - EDA Geek News  Aug 12

IBM Qualifies Mentor's 45-nm tools  Feb 26

2005

Guidelines to Maximize the Performance of Verilog-AMS/VHDL-AMS Behavioral Modeling  May 26

Advanced RF Silicon Modeling Adobe Acrobat Document Apr 01

Getting to Silicon: Accuracy Requirements of Nanometer Designs Adobe Acrobat Document Feb 17

Litho H2O: OPC Modeling for Immersion Lithography  Feb 01

2004

Enhancing Manufacturing Test and Yield in the Nanometer Adobe Acrobat Document Aug 24

Nanometer IC Design: The Altered State of DFM Adobe Acrobat Document Jun 07

Design for Manufacturing Must Move up in the IC Flow Adobe Acrobat Document Apr 14

Silicon Modeling in the Nanometer Era Adobe Acrobat Document Mar 04

A New Definition of Fracturing  Mar 01

Lithography: The integration of TCAD and EDA Adobe Acrobat Document Feb 01

Design-for-manufacturing demands new infrastructure  Jan 15

GDSII-based flow speeds mask data preparation  Jan 09

2003

A Little Light Magic, IEEE Spectrum Adobe Acrobat Document Sep 01

The Glue In A Confident SoC Flow  Jul 21

Turning Up The Yield - IEE Electronics Systems and Software Adobe Acrobat Document Jul 08

Addressing mask costs  Jul 01

Simulators Shred the Limits of Mixed Signal Designs Adobe Acrobat Document Jun 01

2002

Mixed-signal design flow enables RF CMOS chip  Dec 12

Another way around monster mask costs  Dec 09

Follow the Golden Rule Files Adobe Acrobat Document Nov 22

Mentor Unveils Big Mixed Signal Play  Aug 26

The Future of Extraction in Mixed-Signal Design  Aug 21

Solutions for Maximizing Die Yield at 0.13 Micron - Solid State Technology  Jul 24

The Power of One: Eliminating the Problems of Dual Physical Verification Flows  Jul 15

What designers should know about RET  Jun 05

The 39th DAC Design the "Big Easy" Way - EDN Adobe Acrobat Document May 15

Single tool serves IC verification best  Apr 02

Choosing a Fast, Smart and Accurate LVS Tool  Jan 07

2001

Mask Data Preparation Sidesteps Data Volume Complications. - Electronic Design Article by David Maliniak Adobe Acrobat Document Dec 01

Simulation Tool Models And Verifies Timing Jiter In Oscillators - MICROWAVES & RF Adobe Acrobat Document Sep 12

Optimal insertion points for OPC and PSM in design flows  Sep 01

Technique will change chip design, speakers say  Apr 03

Panel debates value of mixed-signal design tools  Mar 08

2000

ASML Masktools offers scattering-bar IP for use with Mentor Graphics' Calibre software Adobe Acrobat Document Feb 29

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