Mentor Graphics Calibre Pattern Matching Enables Advanced Checking of TSMC 20nm Designs

WILSONVILLE, Ore., June 4, 2012— Mentor Graphics Corp. (NASDAQ: MENT) today announced that TSMC will use Calibre® pattern matching (PM) capabilities within its Unified DFM Engine for 20nm litho process checking (LPC). The Calibre PM facility provides fast pattern-based analysis to identify potential litho yield detractors (high-risk features known to be difficult to image) that may be present in the layout.

Calibre PM provides a fast, scalable and robust implementation of layout pattern matching that is seamlessly integrated with the traditional Calibre DRC platform. It also includes a graphical environment for defining and managing pattern libraries in either interactive or batch mode.

“The incorporation of powerful pattern matching capabilities within the Calibre platform provides designers with a comprehensive solution for physical verification and design for manufacturing (DFM) signoff at leading edge nodes,” said Joseph Sawicki, vice president and general manager of the Design-to-Silicon division at Mentor Graphics. “Innovative technology, combined with our extensive interface efforts, makes Calibre the touchstone of the IC development process—the common signoff solution for all phases of the IC design process from initial custom development through full chip verification.”

“Our LPC Unified Engine delivers high accuracy and fast turnaround by eliminating the need for full chip litho simulation,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “Calibre PM is an important component of this capability because it quickly identifies the suspect patterns that require further analysis, while freeing the rest of the layout from the need for litho simulation.”