Tower Semiconductor Adopts Mentor Graphics Calibre as Internal Standard for Design-to-Silicon
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WILSONVILLE, Ore., June 16, 2003 - Mentor Graphics? Corporation (Nasdaq: MENT) today announced that Tower Semiconductor Ltd. (Nasdaq: TSEM, TASE: TSEM), a pure-play independent wafer manufacturer that provides design support, manufacturing and turnkey services for integrated circuits, has selected Mentor's Calibre? design-to-silicon platform as Tower's internal manufacturing standard. The Calibre tool suite now in place at Tower includes design rule checking (Calibre DRCTM), layout versus schematic (Calibre LVSTM), parasitic extraction (Calibre xRCTM) and resolution enhancement technologies (Calibre OPCproTM). As part of its foundry services, Tower offers a high-density flash process for embedded memory applications, CMOS image sensors (CIS) for video cellular phones, still cameras and other imaging applications, and analog components with extremely low noise for use in mixed analog/digital devices. "We chose Calibre because it offers a single design-to-silicon platform that meets our requirements for performance, capacity and accuracy," stated Sergio Kusevitzky, vice president of IP and design services at Tower Semiconductor. "Using Calibre not only streamlines our internal processes, thereby improving time to market, but also ensures that our customers receive fully qualified and extensive rule file support, which gives them a distinct market advantage." "In nanometer design, post-layout modifications are required. If they're not done right, it can create serious yield issues," said Joseph Sawicki, general manager of Mentor's design-to-silicon division. "The Calibre design-to-silicon platform of tools handles post-layout modifications with the highest accuracy and performance, which ultimately leads to more profitable IC manufacturing and reduced cycle time." The Calibre Design-to-Silicon Platform To meet these challenges with confidence, design teams turn to the integrated Calibre design-to-silicon platform, which includes physical verification, full-chip, transistor-level parasitic extraction, design for manufacturability (DFM), mask data preparation (MDP), optical proximity correction (OPC) and resolution enhancement technologies (RET). Every facet of the design-to-silicon transition is efficiently and accurately managed by Calibre. In a continuing tradition of delivering advanced technology, the Calibre design-to-silicon platform of integrated tools is recognized as the industry standard worldwide to address the complexities of advanced IC design. About Tower Semiconductor Ltd. In addition to digital CMOS process technology, Tower offers advanced non-volatile memory solutions, mixed-signal and CMOS image-sensor technologies. To provide world-class customer service, the company maintains two manufacturing facilities: Fab 1 has process technologies from 1.0 to 0.35 microns and can produce up to 20,000 150mm wafers per month. Fab 2 features 0.18-micron and below process technologies, including foundry-standard technology, and will offer full production capacity of 33,000 200mm wafers per month. The Tower Web site is located at www.towersemi.com. About Mentor Graphics Calibre and Mentor Graphics are registered trademarks, and Calibre DRC, Calibre LVS, Calibre xRC, and Calibre OPCpro are trademarks, of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners. ###
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