This paper describes the design challenges of BlueTraC, a low-cost, low-power radio transceiver and the usage of mixed-signal/mixed-mode techniques and behavioral modeling with Questa ADMS from Mentor Graphics to address and solve them. BlueTraC from Spirea is a Bluetooth 1.1 compliant Class 2 radio transceiver. In addition to all the required RF and analog functions, the chip also includes a complete digital GFSK modem, making it a very complex mixed-signal (MS) system-on-chip (SoC). VHDL-AMS, the mixed-signal IEEE 1076.1 standard modeling language, was used to describe the SoC building blocks at different levels of detail and complexity. This permitted us to perform top level functional verification and debugging, as well as detailed subsystem simulations throughout the design process. We are presenting the concept and the results we obtained, in terms of performance and accuracy. The methodology that we deployed increased the confidence in silicon success and allowed on time delivery.