Analog-to-digital converters (ADCs) are key building blocks in wireless communications and many other applications. Qualcomm pays particular attention to verifying ADC performance in the presence of device noise and to verifying the ADC overall noise performance specifications. Due to limitations in a previous toolset, Qualcomm had to rely on an error-prone manual block-level ADC noise analysis flow that took a long time and required many assumptions. Qualcomm recently adopted a simple ADC noise analysis flow that uses Berkeley Design Automation (now Mentor Graphics) Analog FastSPICE (AFS) transient noise analysis. This capability delivers full-circuit, SPICE-accurate ADC noise analysis—including device noise— in a single simulation run and typically requires less than a day, depending on the complexity of the circuit. The results from the transient noise verification correlate very well to silicon. Qualcomm now uses AFS-based transient noise analysis for ADCs prior to signoff. This white paper highlights ADC noise analysis challenges, describes the previous ADC noise analysis methodology, and details the new signoff methodology.