Post-Layout Analysis with Eldo and Eldo RF
White Paper
ABSTRACT
It is important to verify the behavior and interaction of digital, analog and RF circuitry together in the presence of layout parasitics. This also means being able to debug the design in the presence of parasitics, and mastering large amounts of parasitic data. An approach is presented which allows the design engineer to use Eldo® and Eldo RF to achieve the best combination for accuracy, performance and debugging.
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