As IC technologies shrink and via defects remain the same size, the probability of via defects increases. Redundant via insertion is an effective method to reduce yield loss related to via failures, but a large number of extremely complex design rules make efficient automatic via insertion difficult. This paper introduces an automatic redundant via insertion flow which is capable of adopting new technologies and complex design rules extremely quickly. Runtime and efficiency are optimized through a smart insertion scheduling technique. Our experiments show that it efficiently improves redundant via percentage, making designs more robust against via defects.