This paper illustrates the use of the Eldo® Control Language (ECL) for the efficient simulation of phase locked loop (PLL) locking times. The theory of PLL is not reviewed, thus the reader is assumed to have a basic understanding of PLL. We will use a simple integer-N PLL as an example of using ECL for monitoring CPU-intensive circuit simulations. Through this example, we will show how to control incremental simulations from an ECL task. The techniques developed here can be used for other types of circuits, such as switched voltage regulators.