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Accelerating Data Converter Circuit Characterization with AFS

Like many high-performance analog designers, Govert Geelen, Senior Principal Engineer at IDT in the Netherlands, has a tremendous challenge when it comes to characterizing his nanometer circuits.

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Results are available on-the-fly, and final results are in the same form as they would be in a single run.”

The Problem

Govert designs high-speed digital to analog converters for telecom base stations. These circuits can have over 350K elements when in post-layout form. Optimization of the design for a given application requires many nests of sweep and Monte Carlo analyses to understand the influence of variables and parameters on performance. These transient simulations take several days to complete. Simulation throughput is not only a challenge for the individual designer, but also taxes the available simulation resources of the whole design team, thus pressuring the design schedule. In order to address the simulation throughput challenge, Govert adopted the Mentor Graphics Analog FastSPICE™ (AFS™) Distributed Multi-Core Parallel (DMCP) capability, resulting in the reduction of simulation time by as much as 30x compared to running each simulation sequentially and single threaded.

The Solution

AFS supports three parallelization capabilities: Multithreading (MT), Multi-Core Parallel (MCP), and Distributed Multi-Core Parallel (DMCP). AFS MT uses multiple cores to speed up simulation for an individual run or iteration. AFS MCP automatically distributes the iterations of repeated-run simulations evenly across the number of available cores in a single machine, thus resulting in a speedup that is nearly linear with the number of cores. AFS DMCP distributes MCP/MT jobs across multiple machines. Figure 1 illustrates the DMCP use model. DMCP was used in conjunction with both MCP and MT at IDT to optimize throughput. In this case, there are eight machines with 16 cores each. The example shows 32 iterations in parallel, each utilizing 4-core multithreading. DMCP relies on LSF for job submission. AFS DMCP supports all types of characterization, including sweeps, corners, Monte Carlo, and combinations thereof. Users can choose any analysis and use the command line or the Mentor Graphics Analog Characterization Environment (ACE) to set up and launch simulations. Using existing LSF queues, AFS DMCP enables job management, automatically submits the repeated runs, and provides users access to real-time monitoring of multiple jobs. Results are available on-the-fly, and final results are in the same form as they would be in a single run. Additional advantages with the AFS Platform include single core performance that is 5x–10x faster than traditional SPICE (single thread) and a very efficient licensing model for parallelization that only requires one additional license for every four active cores.

The Results

Results with Analog FastSPICE DMCP in Govert’s application, a typical runtime of a single iteration (single core, no multithreading) varies from 10 minutes for subcircuits to several days for top-level circuits. The number of iterations varies between one, for nominal only, to 32, for nested sweeps or Monte Carlo, with a typical number of eight iterations. Figure 2 shows a results summary and a set of sweeps used for characterization. For single iterations, Govert uses multithreading to reduce simulation time from several days to less than a day. When using MCP with multithreading, the configuration optimizes the use of the number of cores in the machine. For example, for an 8-value sweep on a 16-core machine, the settings are MCP=8 and MT=2, resulting in a speedup of more than 7x when compared with sequential multithreaded runs. The maximum parallelization Govert currently uses is 32 for nested sweeps or Monte Carlo analysis. The setting was DMCP=8, MCP=4, and MT=4, resulting in 32 iterations being done in parallel with an approximately 30x speedup on the simulation throughput when compared with individual multithreaded runs. Each machine was thus using 16 cores in total (MT * MCP) and a total of eight machines (DMCP). The combined results are stored in one output file. The MCP/MT/DMCP licensing enables the jobs to run with 3x–4x more license efficiency than an equivalent sequential run.

 

Additional advantages with the AFS Platform include single core performance that is 5x–10x faster than traditional SPICE (single thread) and a very efficient licensing model for parallelization that only requires one additional license for every four active cores.”

 
 
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