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STMicroelectronics/Eldo Premier

Challenge: find a Fast-SPICE simulator that provides full, transistor-level SPICE accuracy at faster simulation speeds. The result: a significant increase in performance delivered simulation results in a much shorter time.

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Because Eldo Classic is the golden reference simulator at ST, we wanted to evaluate Eldo Premier to verify the speedup factor we could obtain using it for our big simulations.”

Claudio Vignati, CAD engineer, AMS design and verification methodologies

STMicroelectronics is a world leader in IC design and manufacturing with front- and back-end plants in Europe and Asia that cover a wide range of processes; from pure CMOS, non-volatile memory, and Smart Power technologies (called BCD as it provides bipolar, CMOS, and DMOS devices) down to deep sub-micron lithography (32 nm and below). This allows ST to design ICs for a broad range of applications for the home, car, health industry, mobile devices, and more.

Elena Raciti and Claudio Vignati are part of the TR&D (Technology Research and Development) organization, which is responsible for the definition and development of an integrated, mixed-signal verification and design flow. Their mandate is to identify the best-in-class tools on the market and make them available to the ST analog and mixed-signal designer community to use within this flow.

members

Members of the ST TR&D team, from left to right: Claudio Vignati, Domenico Genova, Elena Raciti, and Pierluigi Daglio.

Design Flows

The ST AMS design flows and verification methodologies are organized into a comprehensive, integrated flow.

SmartPower Table

Table 1: List of test cases. Rows 1–6: CMOS/NVM; Rows 7–9: Smart Power.

Eldo Clock Tree

Clock tree current plot of Eldo and Eldo Premier test case results.

Table2

Table 2: CMOS test case results.

Table3

Table 3: Smart Power test case results.

Table4

Table 4: Multi-thread efficiency.

Table5

Table 5: Comparison of Eldo Classic versus Eldo Premier.

Table6

Table 6: Comparison of Questa ADMS Classic versus Questa ADMS Premier.

When evaluating the available tools for their flow, the TR&D team follows criteria based on what ST designers’ say they need most. “Our designers want solutions that enable them to verify the coverage of their top-level designs and the robustness of their circuits at many process corners,” reports Elena Raciti, CAD engineer, AMS design and verification methodologies. “They also want the tool to tell them the reason for a system failure, and they need to be able to check the effects of tuning the size of a device.”
These requirements dictate that the chosen simulator is fast, accurate, and easy-to-use. The tricky part lies in balancing the tradeoff between speed and accuracy. Fast-SPICE simulators and AMS behavioral modeling methodologies can speedup simulation and verification time significantly; however they negatively impact the accuracy of simulation results.

This is acceptable for some verification tasks, but at some point in the design flow (such as critical analog block debug, tape-out checks, and regression tests), designers require full, transistor-level SPICE accuracy but at faster simulation speeds.

“Because Eldo Classic is the golden reference simulator at ST, we wanted to evaluate Eldo Premier to verify the speedup factor we could obtain using it for our big simulations,” recalls Claudio Vignati, CAD engineer, AMS design and verification methodologies. The evaluation protocol covered several aspects of the day-to-day design work. Several analyses were run, not only in pure transient and transient-noise simulations, but also within a Questa ADMS simulation. ST evaluated different multi-threading options (1, 4, and 8) on a wide range of test cases in terms of technology, size, and complexity.

In all of the test cases, the Eldo Premier results were below 1 percent of error with respect to the Eldo Classic results; so these results are considered to be identical, as shown in the clock tree current plot.

In the first CMOS example (charge pump), the small size of this design (below 2k devices) does not allow Eldo Premier to deliver an impressive speedup ratio; but the larger test cases exhibit a very significant speedup (2x to 5x). “For the larger test cases, simulation with Eldo Premier gave us the same accuracy as Eldo Classic but without compromising or simplifying the netlist or device models,” Vignati observes.

For Smart Power technologies, the model cards were much more complex than the CMOS/NVM ones, so the results were considered separately and showed a slightly lower performance boost (1.5x to 2x).

In contrast, when analyzing multi-thread efficiency, Eldo Premier showed, on average, speed improvements of 20 percent on four threads and 25 percent on eight threads versus a single thread.

“Based on our tests, we have defined a rule of thumb for designers that Eldo Premier can be used on designs with more than 10k devices, confirming what is described in the Eldo Premier User Manual,” Raciti explains. “Simulations on CMOS/NVM designs can reach over 1 million devices with Eldo Premier, but BCD designs seem limited to 400k devices. Each design is a specific case, as complexity plays a role in the simulation performance, so further tests can be performed on designs that do not exactly follow this rule. We discovered that for transient noise, we were able to get a significant speedup (2x to 7x), even on small designs below 1k devices.”

“Our Questa ADMS tests have also shown a significant speedup factor (2x to 6x) when running simulations with a large part of the design at the transistor level,” adds Raciti.

From all these tests, ST concluded that, for the analyses considered (transient, transient noise and mixed-signal simulation), Eldo Premier and Eldo Classic provide the exact same accuracy but Eldo Premier is able to reach up to 4.9x speedup compared to Eldo Classic, all conditions being equal. It was demonstrated that, dependent on technology complexity, Eldo Premier is more effective on circuits with more than 10k devices and for smaller circuits the gain is slightly below 2x. “The benefits of Eldo Premier are the ease-of-use, accuracy, and performance,” says Raciti.

“Thanks to the fact that there were no netlist changes and only a single command line argument, switching from Eldo Classic to Premier is absolutely costless,” Vignati explains. “With the same accuracy as Eldo Classic, the huge increase in performance allows us to get simulation results in a much shorter time, and thus, cover more complex validations or run longer simulations for more coverage and more accurate verifications, even enabling the possibility of Monte-Carlo simulations on large IP designs.”

“We have received very positive feedback from the ST designer community,” Raciti reports. “As their really complex designs were verified successfully and Eldo Premier has been deployed with confidence among them. We are strongly collaborating with Mentor for a continuous improvement.”

“Eldo Premier is really a good tool which complements our design and verification flows, giving our designer community the possibility to simulate faster but with the same accuracy as our consolidated golden simulator, Eldo Classic. With the introduction of Eldo Premier we get a boost in design productivity without waiving reliability” says Pier Luigi Rolandi, TR&D Smart Power Design Enablement and Analog IPs director.

Based on our tests, we have defined a rule of thumb for designers that Eldo Premier can be used on designs with more than 10k devices, confirming what is described in the Eldo Premier User Manual,” Raciti explains. “Simulations on CMOS/NVM designs can reach over 1 million devices with Eldo Premier, but BCD designs seem limited to 400k devices. Each design is a specific case, as complexity plays a role in the simulation performance, so further tests can be performed on designs that do not exactly follow this rule. We discovered that for transient noise, we were able to get a significant speedup (2x to 7x), even on small designs below 1k devices.”

Claudio Vignati, CAD engineer, AMS design and verification methodologies

About STMicroelectronics

STMicroelectronics is a world leader in IC design and manufacturing with front- and back-end plants in Europe and Asia that cover a wide range of processes; from pure CMOS, non-volatile memory, and Smart Power technologies (called BCD as it provides bipolar, CMOS, and DMOS devices) down to deep sub-micron lithography (32 nm and below).

Related Resources

Challenges

  • Find a Fast-SPICE simulator that provides full, transistor-level SPICE accuracy at faster simulation speeds
  • Ability to verify the coverage of top-level designs
  • Verify robustness of circuits at process corners
  • Visibility into reason for system failures and check the effects of tuning the size of a devic

Results

  • Significant increase in performance delivered simulation results in much shorter time
  • Covered more complex validations and ran longer simulations for more coverage and more accurate verifications
  • Introduction of Eldo Premier improved design productivity without reducing reliability
  • Eldo Premier simulated faster but with the same accuracy as golden simulator, Eldo Classic

 
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