White Papers

Presents a verification methodology for 3D-ICs, including connectivity checking and parasitic extraction.  Discusses new challenges and EDA tools to responds to those challenges.  An example illustrates a true 3D-IC stack verification using a GDS based flow.

As process technologies advance, a parasitic extraction tool requires more sophisticated extraction capability to obtain the effective sensitivity analysis users need, while still meeting schedules and accuracy specifications. Mentor’s new parasitic extraction tool, Calibre® xACT 3D, enabled the Semiconductor Technology Academic Research Center (STARC) to easily and accurately extract the capacitance adjacent to a device on an individual component basis, and create a new reference based on the extraction. With its unique technology and high-quality performance, Calibre xACT 3D can be an integral part of the sophisticated extraction flow needed for today’s complex designs and advanced process technologies.

For sensitive mixed-signal designs at small process nodes, the influence of parasitic elements is growing with the increasing interactions among devices and interconnects that are in close proximity. Circuits are highly sensitive to these parasitic effects, and accurate parasitic extraction is critical for first silicon success. New 3D parasitic extraction technology applied to a flash ADC circuit design reduces the need for extra guardbanding and ensures that it will work according to the specifications when manufactured.

Memory designers need to increase bit density to meet exacting specifications for fast data transfer and low power consumption. Higher density increases the interactions between interconnect and devices, yet they have to design with real design margins. Accurate characterization is required at every step of memory design. Memory designers need a tool that can help them analyze parasitic issues accurately and quickly at every stage of the physical design cycle, as well as design cutting-edge memories from basic building blocks to the full chip. Using Calibre xACT 3D at all stages of memory design, from bit cell design to full chip sign-off, ensures a robust design that will work to specification when it is manufactured.

In this paper, we present a modeling approach for analog-to-digital converters (ADCs) based on modeling the static transfer function using integral nonlinearity (INL) measurements. The methodology relies on applying a Fast Fourier Transform (FFT) test to the output of a real ADC circuit and extracting the significant harmonics. These are used in a behavioral functional model to approximate the INL using a polynomial function. The resulting model is independent of the ADC type or structure, and is suitable for bottom-up system verification. We compare the performance of the new model with other models based on different modeling approaches, and show a gain in simulation speed of up to 300X.

The Eldo Premier simulator addresses the primary concern of analog and mixed-signal designers— performance and capacity increase without sacrificing accuracy. Eldo Premier accelerates the transient simulation, in a spectacular way, of large circuits in either pre-layout or post-layout phases by using sophisticated resolution techniques that do not sacrifice accuracy compared to the golden SPICE results. Eldo Premier accelerates both single-thread simulations and multi-thread simulation. The acceleration of single-thread simulation is provided by new algebraic techniques for the resolution of the system of non-linear differential equations that analog simulators must solve. The acceleration of multi-threaded simulations is a consequence of the natively parallel code of the new simulation kernel and its dedicated data structures. These two acceleration factors naturally combine to offer a significant increase in speed over Eldo Classic. The most significant increases are observed for large circuits (typically at least 10K devices or so), that exhibit some degree of hierarchical regularity. Keywords: Eldo Premier, Fast SPICE, circuit simulation, circuit analysis, parallel processing, speed, capacity, accuracy, foundry certified.