Calibre Interactive FAQs
Q. What is Calibre Interactive?
A. Calibre Interactive is a physical verification tool for cell and block designs. It is easily accessible from within popular layout environments such as Cadence Design Systems' Virtuoso™ and Mentor Graphics' IC Station? Calibre Interactive uses the same rule files as the Calibre full-chip verification tool, thus enabling a single verification flow.
Q. How can I benefit from a single verification flow?
A. A single verification flow allows the use of a single set of rule files for both cell/block and full-chip verification. It eliminates the discrepancies caused by out-of-synch verification flows. Discrepancies need to be reconciled and resolved individually, potentially extending the tape-out period and causing time-to-market delay. A single verification flow also eliminates the duplicate maintenance and training required when employing verification tools from multiple vendors.
Q. How do I know Calibre Interactive is mature and ready for my demanding verification needs?
A. Calibre Interactive uses the same processing modules as the proven Calibre full-chip verification tool, thereby leveraging the benefits and robust capabilities of Calibre. Calibre Interactive also uses the same rule files and performs the same checks as Calibre. This ensures Calibre Interactive will produce the same accurate results as Calibre.
Q. What is the invocation GUI?
A. Calibre Interactive's easy-to-use invocation GUI allows complete control of all the set up parameters prior to a verification run. It offers tool bar session control, flags missing data (red text), loads runsets that automate verification runs, selects checks, sets output files, and starts RVE automatically from the Outputs pane. The invocation GUI eliminates the need to learn and remember command line syntax, and reduces the time consumed by highly iterative cell/block verifications.
Q. What about debugging?
A. Ease and power of debugging is crucial in interactive cell/block verification. Calibre Interactive excels at rapidly identifying design rule violations and LVS discrepancies with its powerful yet easy-to-use Results Viewing Environment (RVE). RVE is automatically invoked during a verification run. It saves debugging time with features such as cross-probing, flexible results selection and sorting, and electrical shorts isolation by layer. In addition, users can effortlessly trace complex netlists with the SPICE netlist browser.
Q. Can I specify an area, instead of the whole design, for performing DRC?
A. Yes. Calibre Interactive supports Area DRC, which lets users perform DRC on a specified area instead of the entire cell or block. This can dramatically cut verification cycle time during debugging.