Memory IP (Novelics)
Features and Benefits
The Mentor embedded Memory IP seeks to achieve optimum dynamic power, leakage, density, speed, reliability and cost for low-power and high-performance ASIC, ASSP, and SoC designs. These memory IPs are implemented with the standard logic CMOS process with no additional masks or process steps to minimize cost and to maximize reliability and portability. Users of this Memory compete in low-power consumer, wireless, high-speed computing, industrial, and networking applications.
The memory's faster speeds, lower power and reduced leakage will translate into electronic devices that are less expensive, physically smaller, run cooler, and have longer battery life..
The Mentor Graphics patented designs include breakthroughs in the fundamental methods of implementing memory circuits, including new patented bit cell, peripheral circuits, and sense amplifier circuits that significantly reduce semiconductor area, access times, and power consumption. Consumer and commercial electronics products will benefit by:
- Reducing the costs of processing chips by reducing the semiconductor area required for memory by up to 50 percent with coolSRAM-1T and eliminating the extra mask layers and special processing steps required by competing technologies;
- Allowing more powerful features with faster memory access time compared to the industry standard;
- Significantly increasing battery life through decreased system power consumption.
All the supported memory technologies are offered through a common Web-based specification and circuit generation tool called MemQuest™. MemQuest allows a variety of memory formats, including coolSRAM-1T, coolSRAM-6T, coolSRAM-8T, coolREG-6T, coolREG-8T, coolCAM, and coolROM to be designed using the same tool.
MemQuest allows designers to customize the various attributes of the memory such as size, aspect-ratio, area, access time, dynamic power consumption and leakage current. This results in compiler generated custom memory designs in a matter of hours, instead of the typical months of development time, reducing time-to-market and production costs. MemQuest concurrently optimizes the desired specifications and automatically generates the simulation models and physical circuit design.
Farzad Zarrinfar, General Manager of the Mentor Novelics business unit, explains how Mentor embedded memory IP is optimized for the latest ASIC and SoC designs. Mentor IP provides the lowest leakage and... View Video