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coolSRAM-1T

Mentor Graphics coolSRAM-1T embedded memory IP is the industry’s only silicon-proven, single transistor SRAM IP solution that can be implemented in a bulk logic CMOS process without requiring additional masks or manufacturing steps. Use of coolSRAM-1T lowers overall system level cost by reducing both the area of standard embedded SRAM and the number of external components. coolSRAM-1T is used in circuits that require minimized block size with conservative speed. This can be complemented with coolSRAM-6T, coolSRAM-8T, coolREG-6T, and coolREG-8T for high speed applications.

Based on Mentor patented SRAM-1T technology, coolSRAM-1T is an ideal solution for high-density SRAM integration in ASICs, ASSPs, VLSI and System-on-Chip (SoC) applications. Embedded coolSRAM-1T blocks are custom configured by the designer and compiled to meet the design specifications, providing an unprecedented mix of low power and high density to minimize total system cost.

Like all Mentor Graphics embedded memory IP, coolSRAM-1T can be customized via the MemQuest memory compiler, a Web-based on-line tool suite that enables the SoC designer to specify and implement custom memories in a matter of minutes.

Features and Benefites

  • Customer architected through the MemQuest memory compiler and characterization tool
  • Circuits based on patented circuits and 1T cell design
  • Standard, unmodified Logic CMOS process
  • Up to twice the density of standard 6T SRAM
  • Reliable operation and performance
  • Very low leakage current
  • Offered in leading-edge process nodes at major foundries
  • Instances can be compiled with complete control of design variables
  • Nearly seamless replacement for existing SRAM-6T
  • No additional mask or process layers required for manufacturing
  • Ideal for portable applications requiring low system power and high densities
  • Typical 50% increase in available logic or 25% reduction in SoC chip area over 6T
  • Higher density L2 cache for CPUs, DSPs, GPUs and configurable CPUs
  • Significant system cost advantages in applications such as on chip frame buffers
  • Lower total product cost and time-to-profit
 
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