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Ultra Low Leakage/Power, High Density, High Speed Memory IPs for Advanced SoCs

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How to generate a basic HTML report setup file from Calibre Interface

Calibre HTML reporting function can generate reports to be read by anyone with a web browser. To create a report user needs to have a setup file and an input specification file and run it in batch mode....…View Technology Overview

How to create layout snapshots of specific locations in batch

This video shows you how to utilize DESIGNrev and RVE to generate snapshots of any layout locations in batch. Abstract: Often times, user needs to capture a few certain spots in the layout to make a report....…View Technology Overview

How To Include and Exclude Rule Checks using Calibre RVE filters

Learn how-to filter rule-checks in the Calibre DRC results database to only focus on the rule-checks that you are interested to debug using the filtering mechanism in Calibre RVE.…View Technology Overview

Other Related Resources

FinFET and Multi-Patterning Aware Place and Route Implementation

White Paper: The use of finFETs and multi-patterning has a huge impact on the entire physical implementation flow. This paper outlines the new challenges in placement, routing, optimization, and physical verification...…View White Paper

Electromigration Analysis at Advanced Nodes

White Paper: Continuous downward scaling is challenging traditional electromigration signoff. This white paper presents a new methodology for EM assessment in power grid networks that uses grid redundancy and analyzes...…View White Paper

Best Practices: OASIS File Compression

White Paper: Unlike other layout file formats, the OASIS file format supports compression of its internal data. However, the type of compression you use can make a significant difference in both file size and runtime....…View White Paper

 
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