PCIe 1.1 Controller Family
Product Benefits
- PCIe specification 1.1 compliant
- The product family includes a: X1, X2, X4, X8, and X16 controller
- Highly configurable and scaleable architecture
- Each controller can be easily configured for Endpoint, Root port, Switch port, or Dual mode (Endpoint/Root)
- Each controller is configured and fully optimized based on the specific lane width requirements
- Low silicon footprint - suitable for multiple instances of the IP in single ASIC/FPGA
- Multi-function support up to 8 functions
- Multi-VC support up to 8 channels
- Capable of queuing up to 8 transactions concurrently
- High performance with low latency and maximum throughput
- Supports operation with 8-bit and 16-bit PIPE interface
- Implements all optional configuration space and capability structures
- Supports all power management states L0, L0s ,L1,L2 & L3
Number of Lanes
X1
- Application Datapath Width: 32 bit
- PIPE PHY Width: 16 bit
- PCIe Clock Frequency: 125 MHz
- Application Configurations: End Point, Root, Switch, Dual Mode (E/R)
- PCIe Line Bandwidth: *5Gbps
* indicates the theoretical maximun line bandwidth.
X2
- Application Datapath Width: 64 bit
- PIPE PHY Width: 16 bit
- PCIe Clock Frequency: 125 MHz
- Application Configurations: End Point, Root, Switch, Dual Mode (E/R)
- PCIe Line Bandwidth: *10Gbps
* indicates the theoretical maximun line bandwidth.
X4
- Application Datapath Width: 64 bit
- PIPE PHY Width: 16 bit
- PCIe Clock Frequency: 125 MHz
- Application Configurations: End Point, Root, Switch, Dual Mode (E/R)
- PCIe Line Bandwidth: *20Gbps
* indicates the theoretical maximun line bandwidth.
X8
- Application Datapath Width: 64 bit
- PIPE PHY Width: 8 bit
- PCIe Clock Frequency: 250 MHz
- Application Configurations: End Point, Root, Switch, Dual Mode (E/R)
- PCIe Line Bandwidth: *40Gbps
* indicates the theoretical maximun line bandwidth.
X16
- Application Datapath Width: 128 bit
- PIPE PHY Width: 8 bit
- PCIe Clock Frequency: 250 MHz
- Application Configurations: End Point, Root, Switch, Dual Mode (E/R)
- PCIe Line Bandwidth: *80Gbps
* indicates the theoretical maximun line bandwidth.