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Ultra Low Leakage/Power, High Density, High Speed Memory IPs for Advanced SoCs

Farzad Zarrinfar, General Manager of the Mentor Novelics business unit, explains how Mentor embedded memory IP is optimized for the latest ASIC and SoC designs. Mentor IP provides the lowest leakage and...

TAGS: High Density, High Speed Memory IPs, Low Power, Ultra low leakage

Ethernet IP Enables Wintegra to Launch a Powerful New Line of Next-Generation WinPath Devices

Wintegra develops a highly integrated, access packet network processors for its WinPath product line utilizing the Mentor Graphics 10/100/1000 Mbps Ethernet MAC IP.

Mentor Graphics and Kawasaki Microelectronics Team Up to Make Communications IP Cores a Cornerstone of Custom ASIC Development

Kawasaki Microelectronics turns to the Mentor Graphics® Intellectual Property division for reliable, proven, and preverified standards-based IP cores.