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Nethra Imaging successfully launches a new line of NI-20x0 image processors with the help of Mentor Graphics I2C IPblock

As Nethra’s first product entry, the NI-20x0 family of SoC solutions brings the image quality of film to the mobile handset. The programmable image processor family allows OEMs to bring performance, flexibility, and low power to a wide range of digital consumer applications.With the implementation of Mentor’s I2C peripheral IPblock, Nethra was able to launch this new chip quickly and achieve first-time silicon success.

Mentor’s IP allowed Nethra to develop product with a high level of confidence by having the ability to verify the design in FPGA, demonstrate it to our customers, and bring it to silicon.”

Ramesh Singh, President and CEO, Nethra Imaging

Located in Cupertino, California, Nethra Imaging™ is a privately held semiconductor company that develops imaging solutions for compact consumer electronic devices. Incorporated in 2003, and fully operational in January 2004, the goal of Nethra is to deliver flexible, highly programmable digital imaging solutions that provide the end-user with enhanced image quality and longer battery life in ultra-compact devices. Nethra's first release of the NI-20x0 line supports applications in mobile handsets and camera modules.

The NI-20x0 family of image processors includes a developed set of proprietary algorithms used to architect the optimal image-processing engine, which gives Nethra unique positioning in the industry. The core architecture of the device uses a highly scalable image processing pipeline that allows OEMs to develop a single platform to design multiple products. The NI-20x0 for example, enables handset designers to deliver high-quality digital still camera images in today's mobile handsets and PDAs.

Early IP From Mentor Plays a Critical Role

Incorporating IP into a design can be a risky proposition. In Nethra's situation, there was little room for error. Nethra operates in an intense time-to-market business, which means the development schedules are extremely aggressive. The IP had to be trusted to perform as promised. In the competitive, rapidly growing wireless imaging market, one tiny error could have serious implications across the entire design flow. To further complicate matters, Nethra is operating as a start-up company – they must take their silicon to market with limited financial and human resources.

The question remains: how successful will the IP perform? Because of Mentor's reputation as a world leader in proven IP and professional support structure, Nethra had complete confidence that Mentor's I2C host interface with a verification model would deliver as promised.

One major advantage of Mentor IP over the competition is Mentor's complete set of deliverables. Mentor IP is delivered with source code (Verilog or VHDL), testbenches, a reference technology netlist, synthesis script for design compiler, and a programmer's guide. Nethra immediately noticed a significant benefit with Mentor's deliverables. "Your testbench allowed us to easily understand how the IP operated. It allowed us to find out early how things worked," said Chandan Sharma, Senior Design Engineer at Nethra Imaging. "Mentor IP documentation simplified the core and helped with the ease of integration," Sharma added.

Ease of Integration: Another Key Advantage

Nethra's first-time silicon success can be attributed to a variety of factors. The ease of integration and subsequent verification was one area in which the design team was thoroughly impressed with Mentor's I2C IPblock. The I2C IPblock played a critical role in the design because the host and slave mode communicate through two different ports. The proper integration and verification for system level functionality is essential for first-time delivery success."The main point is how seamlessly the whole process went. Mentor IP helped us achieve our objectives early on in the design cycle," said Sharma.
Verification of IP Creates a Huge Benefit

Because Nethra creates prototypes of the ASIC design in FPGA, it was essential that Mentor's IP be available in both FPGA and ASIC for successful functional testing. Mentor IP allowed Nethra the accurate means to verify its design and to develop system level software, which meant Nethra could take an early FPGA prototype to perspective customers. "As we near silicon, anything we can do to promote our technology, and sell before tape-out, is a key advantage for a start-up like us," declared Ramesh Singh, President and CEO of Nethra Imaging.


The NI-20x0 block diagram highlighting various functional blocks

Equally important is the verification of the IP itself. Murty Bhavana, VP of Marketing at Nethra added, "Having the ability to take the same core and bring it up gives us software compatibility – and the ability to design the hardware around it, so nothing needs to be changed going from FPGA to silicon."

Mentor IP Rises to the Challenge

Nethra was extremely pleased with the implementation process and overall success of the MentorI2C IPblock. In fact, the new NI-20x0 line of processors is being sampled today by a select list of Nethra customers.

From a business standpoint, Nethra accomplished a great deal in a very short period of time. "We began operations in January 2004 and by March of 2005, not only did we have the silicon back, we actually had the customer prototypes up and running," claimed Bhavana. "In less than 15 months we went from a start-up with virtually nothing to actually having a product working in customer platforms."

Because of Mentor's proven IP core, ease of integration, and excellent support infrastructure, Nethra was able to lower the risk during the design process, which led to faster time-to-market and the company's first successful tape-out. As Singh was pleased to point out, "Nethra's future products will offer higher integration features and we look forward to developing an even more strategic relationship with Mentor to stay successful."

Our systems engineering team required us to have co-verification capabilities for the entire design, from software development to hardware bring up. Nethra was able to accomplish these goals using Mentor’s I2C IP block.”

Chandan Sharma, Sr. Design Engineer, Nethra Imaging

“Mentor’s proven IP core and excellent support helped us lower risk and allowed us faster time-to-market and our first-time silicon success.”

Murty Bhavana, VP of Marketing, Nethra Imaging

 
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