Successful launch of TranSwitch EtherMap leverages Mentor Graphics Ethernet IP
TranSwitch develops highly integrated communication semiconductors for Ethernet switching, controllers, SONET/SDH transport & switching, and broadband access. The TranSwitch EtherMap product line, featured in over 100 OEM devices around the world, utilized Mentor's 10/100/1000Mbps MAC IP core for successful first-to-market timing when it launched in 2002.
“We incorporated Mentor Ethernet IP to make our cutting edge device as stable as possible in an environment and time frame where standards and board EoS experience are at a very nascent stage.”
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TranSwitch Corporation of Shelton, Connecticut, was founded in 1988. As a fabless semiconductor company with design centers around the world, TranSwitch enables OEMs in the telecommunications and data-communication sectors to build next-generation equipment for converged Internet protocol and time division multiplex (TDM) networks. The company has a diverse customer list including major tier 1 telecommunications OEMs including Alcatel Shanghai Bell, Cisco, Fujitsu, Siemens, and ZTE to name a few.
With dozens of patents in SONET/SDH, TDM switching, and PDH (Plesiochronous Digital Hierarchy) transport, TranSwitch develops carrier-class ICs that allow OEMs to gain the benefits of high integration, high volume, and high performance characterized by low power – a capability FPGA and home-grown ASICs cannot approach. The TranSwitch EtherMap-3 and EtherMap-12 product lines were the first wave of Ethernet over SONET/SDH (EoS) transport products to hit the market in 2002 for high and low order mapping utilizing VCAT/LCAS (Virtual Concatenation/Link Capacity Adjustment Scheme) mechanisms. TranSwitch systems and applications engineers led customers through first-generation EoS design cycles as the OEMs raced to integrate a radically different Ethernet packet concept into the complex legacy TDM world.
Standards-based IP Means Reduced-Risk IP
Before incorporating intellectual property (IP) into its EtherMap-3 chip design, TranSwitch conducted an extensive investigation with numerous primary IP suppliers. The selection of Mentor was the culmination of weeks of due diligence in hashing out the soundest, most robust, and easiest-to-implement IP blocks for Ethernet MACs. "Mentor's IP was distinctly better because it addressed key issues of compatibility and adaptability at the RTL level in the event small changes had to be incorporated or documented," said Asis Mukhopadhyay, technical leader for TranSwitch. "The deliverables associated with the package were another reason we moved forward with Mentor," Mukhopadhyay added.
TranSwitch realized from the initial Mentor interaction, characterized by streamlined responsiveness, thorough documentation, and solid product support that Mentor would make a welcome addition to the EtherMap-3 team. "We quickly recognized the value that Mentor would bring to the table," said Dr. Hoshang Mulla, TranSwitch's vice president of marketing. "Up until this point, most of our history was not in the area of Ethernet, but rather in TDM and ATM technologies. It was apparent that the selection of Mentor would mitigate the risk. It also helps that Mentor's a world leader in the Ethernet IP market with a major stake in the worldwide IP market," concluded Mulla
A Pleasant Surprise for VLSI Dsigners
TranSwitch quickly integrated Mentor's Ethernet MAC IP into its sophisticated EtherMap chip, which clearly testified to the stability of Mentor's IP. The ease of integration allowed VLSI designers to focus on the key emerging features for EoS and aspects of the device that would be more challenging. "Mentor's MAC IP has roots in the Ethernet standards that dispel general fears of difficulty with integration, compatibility, and stability," said Rob Schwaber, product line manager at TranSwitch. "We incorporated Mentor Ethernet IP to make our cutting edge device as stable as possible in an environment and time frame where standards and board EoS experience are at a very nascent stage."
Optimal Choice at Optimal Place in Time
TranSwitch launched EtherMap-3 Plus and subsequently EtherMap-3 Pt with minimal changes to the design, in concert with new customer requirements as they filtered into this new application area. The stability of Mentor's MAC IP was reassuring among the other more risky design changes necessitated during the IP implementation process. "While fine tuning our part for the optimal application performance in regard to off-chip SDRAM memory controllers, GFP, VCAT and LCAS, it gave us confidence to know the MAC block was solid as a rock so that the focus of regression testing could be isolated," said Mukhopadhyay. "This also translated into cost savings for TranSwitch as the reduced effort on the MAC testing and modification meant our resources could be deployed judiciously in critical higher risk areas, not wasting engineering bandwidth on the Ethernet side of the device bogging us down," added Mulla.
It Goes Down Easy with Mentor IP
TranSwitch's first silicon alpha test device served well to allow for appropriate debug, embellishment, and performance testing. "The Mentor MAC IP was part of the design which was crucial to getting the data to pass quickly and assess the status of the device," claimed Schwaber.
In addition to a successful alpha test, integrating the Mentor MAC IP allowed the TranSwitch design team to focus on key product differentiators. As a result, not only was the team able to build the EtherMap to specifications, they were able to do it quickly – hitting all delivery dates and ultimately getting to market sooner than anticipated. Schwaber equates the process to a fine Mexican meal, "when you order Mexican, you don't worry about the familiar Coke or Pepsi; you're more concerned whether the steak is cooked all the way through and whether the spices are mixed properly in your rice," said Schwaber. "I guess the Mentor MAC block was our refreshing bottle of Coke during our very spicy meal!"
“Mentor’s MAC IP block was solid as a rock.”