Advanced Micro Devices (AMD)
Thermal and Stress Simulations Save Time in New Chip Design
Thermal and stress simulations saved time in the development of a new Advanced Micro Devices (AMD) microprocessor by validating thermal design of the chip and special test equipment prior to prototyping. The company used FloTHERM software to model the performance of the semiconductor and test equipment in realistic cooling environments. They also predicted the temperature of the various elements within the package as well as the temperatures and thermal stresses that are applied to test equipment.
“Simulation helped us identify potential thermal and stress issues prior to first silicon. By iterating on the design of both the chip and the test equipment in advance, we were able to avoid problems that otherwise might have created costly delays. The availability of new software that not only addresses thermal management issues but also automatically calculates the resulting thermal stresses played a key role in our success.”
Learn More about FloTherm
product overview: FloTHERM® is a powerful 3D computational fluid dynamics software that predicts airflow and heat transfer in and around electronic equipment, including the coupled effects of conduction, convection and radiation.
Critical thermal performance requirements
Thermal performance is a critical aspect of nearly every microprocessor design. To that end, every chip released by AMD must meet tough internal performance specifications. But it is difficult to determine the thermal performance of a new design without actually building and testing it. A variety of tests are run to evaluate thermal performance under many different conditions such as with different types of heatsinks and packaging options. Finding a problem involves a time-consuming troubleshooting process and makes it necessary to repeat the physical tests. Another critical requirement is the design of the test equipment to validate thermal performance. A typical test stand includes heating and cooling systems as well as a control system that cycles the microprocessor through many different temperatures while the chip runs performance tests. Designing the control algorithm used to run the test stand is a major challenge because it is based on junction temperatures that are difficult to accurately predict in advance.
Several years ago, AMD engineers evaluated a new generation of software that performs component and system level thermal analysis to resolve thermal issues prior to first silicon. The idea was not to replace physical testing, which is required for validation purposes, but to resolve thermal issues in the silicon and the test stand prior to physical testing to avoid additional design iterations.
"We looked at several different types of computational fluid dynamics software and selected a package that reduces the time and skill that is required to simulate complicated electronics cooling problems because it is specially for electronic cooling applications," Liu said.
FloTHERM software allows users to assemble models from libraries, avoiding the need to create them from scratch. It provides an abundant supply of thermal model libraries for existing components. Automated gridding and distributed processing across networks streamlines the process of evaluating multiple iterations to optimize the design.
The company has also introduced a thermo-mechanical stress module called FLO/STRESS that uses the temperature field calculated by the CFD analysis to provide a fast, first-order estimate of thermo-mechanical stresses within components, boards, thermal interface layers, solder joints, etc. This module requires little additional setup time because it uses the geometry and temperatures already created for CFD to drive the stress analysis.
Creating and solving CFD and FEA models
Liu began by modeling all parts of a new, yet to be announced, microprocessor as cuboids. He then added the model to a model of a board specified in EAI/JEDEC standard EAI/JESD51-3. The boards specified in this standard have very specific requirements for stock material, board outline and trace design. The model was solved to generate thermal performance parameters including junction-to-ambient thermal resistance, junction-to-board thermal resistance, and junction-to-case thermal resistance as well as temperature profiles within the package under various conditions.
Liu tried many heatsinks and also evaluated lid and lidless options. He concluded that the thermal resistance from the junction to the heatsink was higher than desirable in the initial concept design largely because new process rules made it possible to shrink die size. He modified the model to add a metal lid to reduce the junction temperature and improve the mechanical shock resistance of the package. He then re-ran the analysis and confirmed that all thermal performance parameters were within design specifications.
Next, Liu created a new systems level design based on the test stand to evaluate the thermal stress on the heater plate. He first created a CFD model of the test stand that also provided the model and mesh needed for thermal stress analysis. Solving the model generated the temperature results required as input for the thermal stress analysis. The geometry, grid and temperature information were seamlessly passed from the CFD solver to the finite element analysis (FEA) solver at the end of the CFD calculations. The solid areas in the model were discretized using traditional finite element procedures and the change in temperature predicted by the CFD analysis was used to calculate the solid deformation. No extra model building or meshing was required.
"Despite the fact that this was the first time that I had used the program for mechanical stress analysis, it only took about one week to create the package-level and system-level models and to perform thermal and mechanical stress analysis," Liu said. "The results showed that there were no problems with the test stand. In the past we have used traditional finite element analysis software to model test stands. The integrated approach saves a considerable amount of time and also provides more accurate results because it does a better job of modeling convective heat transfer."
Liu concluded that the stress levels of the heater plate were within acceptable levels. The results of the CFD analysis were also used to develop the control algorithm for the test stand.
"Before we started using CFD, we were unable to evaluate the thermal conditions accurately within the package until we had built and tested the prototype," Liu said. "More recently, we have been able to predict junction temperatures accurately long before parts were available for testing. In this application we took a further step forward by using stand-alone finite element software to analyze mechanical stresses on our test stand. We saved a considerable amount of time by using software that tightly integrates thermal and mechanical stress analysis. The software reduces the modeling time by providing a wide range of built-in modeling options designed specifically for modeling electronic components. Identifying and fixing a thermal issue prior to developing prototypes saved us time that would have otherwise been spent troubleshooting and fixing the problem and re-running the physical tests. The result is that we reduced engineering costs and were able to meet our delivery schedule without incurring any additional expense."
AMD is a global supplier of integrated circuits for the personal and networked computer and communications markets with manufacturing facilities in the United States, Europe, Japan, and Asia. Founded in 1969 and based in Sunnyvale, California, the company had revenues of $3.9 billion last year. A Fortune 500 and Standard & Poor's 500 company, AMD produces microprocessors, Flash memory devices, and support circuitry for communications and networking applications. For example, the AMD Athlon™ XP processor 2200+ with QuantiSpeed™ architecture, the first AMD desktop processor based on its 0.13 micron process technology, delivers improved performance, lower power and a smaller die size while maintaining a stable, compatible Socket A infrastructure.
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