Free Download ! All You Wanted To Know About HDI....and MORE!
Free Download ! All You Wanted To Know About HDI....and MORE!
The HDI Handbook - A comprehensive high-density interconnection resource for designers, fabricators and assemblers
First Edition, Written by Happy Holden, et al., Edited by Happy Holden and Diane Neer Here is the link to DOWNLOAD the HANDBOOK (53 MB ZIP)
I have finally finished my book on high density interconnects (HDI). Along with the help of 9 friends and fellow PCB experts, we have created a 631 pages book about HDI.
FOCUS: This book is not intended to introduce PCB Technology to the reader, that is effectively done by Coomb’s PCB Handbook. It does take up High Density Interconnects (HDI) and microvias in much more detail than where Coomb’s left off.
The 16 chapters cover:
Section 1: Introduction
The widespread use of new electronic components employing Ball-Grid Array (BGA), Chip Scale Packaging (CSP), and other evolving technology form-factors means new fabrication techniques must be used to create printed circuit boards (PCBs) that will accommodate parts with extremely tight lead pitches and small geometries. In addition, extremely fast signal rise-times and signal bandwidths challenge systems designers to find better ways to overcome the negative effects of inductance, noise, radio frequency interference (RFI) and electro-magnetic interference (EMI) have on their product’s performance. The use of PCBs incorporating microvia circuit interconnects is currently one of the most viable solutions on the market. Assemblies can be charted by their characteristics. The interaction of interconnect elements, such as assembly, PC boards, and components, are described by their metrics: assembly density, assembly complexity, component complexity and board density. –Happy Holden
Section 2: The Interconnect Market
HDI products, size and market growth rates, examples of different HDI products using the three Platforms: 1. Consumer and mobile phones, 2. substrates and 3. large-high performance boards. The “HDI Vintage Chart” with the three ‘basic’ characteristics of HDI architecture. -Karen Carpenter
Preparing RecommendationsSection 3: Design of Advanced Printed Circuits
As the electronic products industry continues to push the envelope of extreme miniaturization, product developments teams are being forced further into the realm of high density interconnect. Design techniques and substrates labeled exotic only a few short years ago are now considered mainstream. In particular, build-up substrate usage has grown dramatically, and is now found in a large percentage of high production electronic products. This Section is to educate and inform you on the technologies, needs, issues and solutions available today for advanced substrate design. The focus will briefly cover the 4 changes to TH PCB design techniques required for HDI and the IPC Design Standard 2226. -Happy Holden
Section 4: Electrical Performance
The good old days of 10 to 16 MHz clock frequencies are gone. It used to be the chief design challenge in circuit boards or packages was routing all the signals in two layers and getting packages that wouldn’t crack during assembly. The electrical properties of the interconnects were not important because they didn’t affect system performance. But the world has changed in the past 10 years. Clock frequencies on chip now are over 3 GHz, and on board, are over 800 MHz. In most systems, as the clock frequency goes up, the rise time always gets shorter. A shorter rise time means signal integrity problems increase dramatically. Signal integrity is broadly concerned with the problems that arise from how the electrical properties of the interconnects affect system performance. -Dr. Eric Bogatin
SECTION 5: Materials
Many new materials now support HDI. The material performance and slash-sheets from IPC HDI Material Standard 4104 explain many of these. -John Andresakis
SECTION 6: The HDI Mfg Processes
Various HDI mfg processes and structures are explained. These utilize standard PCB processes but with greater miniaturization and higher density. -Happy Holden
SECTION 7: Small Hole Creation
The machines, processes, quality concerns and issues with creating small vias. -Michael Carano
SECTION 8: Metallization
Desmear & metallization (electroless) ,including the materials and processes for paste in vias. -Michael Carano
SECTION 9: Fine-Line Imaging and Etching
Image transfer processes, stripping & etching fine lines, registration, equipment, and materials for fine-line image transfer. -Michael Carano from columns written by Dr. Karl Dietz
SECTION 10: Plating and Finishes
Plating, pulse-plating, small-holes plating and filling, final finishes. -Michael Carano
SECTION 11: Testing
AOI and electrical testing of HDI -Dr. Christophe Vaucher
SECTION 12: Quality, Acceptability & Reliability
Performance of HDI Benchmarking, Vendor readiness, qualification, quality issues, lab techniques and equipment. -Happy Holden
SECTION 13: Assembly Topics
Via-in-pad issues, fine-pitch, soldering & voids, in-circuit testing -Matt Wuensch & Mark Laing
SECTION 14: Embedded Components
Embedded Resistors, Embedded Capacitors, Distributed capacitance and Embedded Actives, the materials and design tools -Happy Holden
Section 15: Advanced HDI & Next Generation Technologies
The use of more complex components with very high I/O counts and increasing speed has pushed the interconnect into the realm of photonics and opto-electronics. The materials, processes and test vehicles for optical waveguides in printed circuits are reviewed. -Happy Holden
Section 16: HDI Substrates & Packages
This Section is to educate and inform on the technologies, design issues and solutions available today for advanced IC substrate design. The focus will briefly cover the challenges of wire bonding, flip chip, stacked dies and packages and through-silicon vias that allow various System-in-Packages (SiP) and 3D architectures. -Per Viklund
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- Fabrication and Assembly Analysis?
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- Embedded passives never boomed –but saves high performance designs
- Gerber to ODB++ - Have You Made the Move?
- Shorter stubs are getting longer
- Stupid vias... {grumble grumble}
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- Using Virtual Prototyping versus Physical Prototyping
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