HDI Training for Fabricators

I’m sure all of you are aware of the rapid progression of HDI technology used in mobile phones, telecom and advanced consumer products.  But HDI is rapidly being introduced into military and space programs as well.  The HDI for military and space has to be ultra-reliable and capable of harsh environments.  The cost to develop these materials and fabrication processes can be quite high.  So the IPC has teamed up with the U.S. Navy and the NSWC-CRANE state-of-the-art PCB facility to develop an advanced HDI Hands-On fabrication course this fall (PD-05).

Open to all fabricators, this is a 3-day, hands-on, working course that embraces the latest advanced HDI features required by new military and aerospace programs and employed by advanced telecom systems as well.  The October 13-15 working laboratory event is proceeded by 5 2-hour WebEx classroom instructions on Sept. 14-18, to provide more “hands-on” time in Oct.  The “Hands-on” attendance is limited to only 21 participants, due to the nature that everyone will build HDI boards, so register early at the IPC.  http://www.ipc.org

PD-05: High Density Interconnect

October 13-15, 2009 - Crane, Indiana

This HDI fabrication hands-on workshop provides an essential instructive platform for companies interested in learning the advanced fabrication processes of HDI technology. Attendees will be provided a “hands-on” working laboratory event that features informative technical tutorials and an invaluable “hands-on” workshop, where you will actually build these HDI structures.  You will be provided the instructional HDI technology as it relates to advanced HDI fabrication — as needed by numerous aerospace, military, telecom and computer OEMs with an emphasis on high reliability and endurance. Join us for this enlightening series, and discover what you need to know to implement HDI technology in all of its forms.

What You Will Learn:

Tutorial presentations and hands-on exercises cover these topics :

• Imaging and etching — achieving fine lines and spaces, controlled copper etch
• Lamination & Via formation — mechanical and laser drilling & lamination of new materials
• Metallization & Electrodeposition — desmear, electroless copper, direct metalization and semi-additive processing— improved throwing power copper fill, enhancing through hole and microvia reliability, copper thickness requirements for thermal reliability and process controls
• Process control coupons, DOE, Reliability and testing—in-process coupons for HDI and reliability coupons
• HDI Exercises at NSWC-Crane Laboratory
• Fine line Direct Imaging/etching- 25 um traces/25 um spaces (~1 mil lines/spaces) using new sacrificial super-foil “DFF”
• Lamination of new thin Laser Drillable Prepreg, like 1086LD or 1067LD for power integrity and impedance control
• Copper “Super-fill” plating to plate up microvias from 75~150 um in diameter
• Drilled via filling with epoxy to plug buried vias
• Etching & laser drilling ceramic BC materials for buried capacitors and distributed capacitance
• HDI process control coupons to monitor the HDI fab process
• IST coupons to test the reliability of the finished HDI board.

High Density Interconnect Webcast Series

September 14-18, 2009

(10:00 am – 12:00 am Central Daylight Savings Time)

This series of five two (2)-hour webcasts will address key technologies for fabricators who want to get into advanced HDI fabrication.

September 14, 2009 - Overview/ Design/ Process Control & Reliability

• Process control coupons, DOE, Reliability and testing—in-process coupons for HDI and reliability coupons

• HDI Exercises at NSWC-Crane Laboratory
• HDI process control coupons to monitor the HDI fab process

• • IST coupons to test the reliability of the finished HDI board

September 15, 2009 - Fine-line and Via-Formation

Imaging and etching — achieving fine lines and spaces, controlled copper etch

• Lamination & Via formation — mechanical and laser drilling & lamination of new materials
• Fine line Direct Imaging/etching- 25 um traces/25 um spaces (~1 mil lines/spaces) using new sacrificial super-foil “DFF”
• Semi-additive processing (SAP) using new molecular interface technology to achieve 25 micron traces and spaces
• Etching & laser drilling ceramic BC materials for buried capacitors and distributed capacitance

September 16, 2009 - Material Control and Lamination

• Lamination of new thin Laser Drillable Prepreg, like 1086LD or 1067LD for power integrity and impedance control

September 17, 2009 - Via-Fill

• Drilled via filling with epoxy to plug buried vias
• Copper “Super-fill” plating to plate up microvias from 75~150 um in diameter

September 18, 2009 - Metallization & Electrodeposition

• Metallization & Electrodeposition — desmear, electroless copper, direct metalization and semi-additive processing— improved throwing power copper fill, enhancing through hole and microvia reliability, copper thickness requirements for thermal reliability and process controls

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