PCB Systems Design Blog

Posts tagged with '3D via'

Put the Pieces in Place for SERDES Success

Posted Mar 6, 2012, by Patrick Carrier

Interconnect loss modeling?  Check.  Signal conditioning modeling?  Check.  Ability to simulate multiple S-parameter models for things like connectors and packages and vias correctly in the time domain?  Oooh…. that’s a tough one.  Check! Ability to include all sources of deterministic and random jitter, worst-case bit patterns, and worst-case crosstalk in the analysis?  Wow!  Check. 3D … Read More

Tags: SERDES, pre-emphasis, BER, channel analysis, 3D via, HyperLynx, interconnect loss, crosstalk, equalization

Shorter stubs are getting longer

Posted Nov 4, 2011, by Patrick Carrier

…It all depends on how fast you are trying to go.  That’s really the name of the game with anything signal integrity.  The faster we go, the more “new” problems we face.  Even if a stub were 50 mils long, if your edge rate is fast enough, such as the edge rates used in many SERDES busses today, it could be enough to fatally degrade your received signal. At the beginning of my … Read More

Tags: 3D via, HyperLynx, 3D field solver, vias, stub, via

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