Posts tagged with 'IBIS'
You may have heard lately about IBIS-AMI models, which are being used more often for SERDES simulation. IBIS-AMI stands for I/O Buffer Information Specification Algorithmic Modeling Interface. These models are an addendum to the existing IBIS spec that contain executable models.
Actually the models contain 3 parts: an analog buffer model, a parameter file, and the actual executable model. The executable … Read More
To begin this series on fundamentals of signal integrity, lets start at the very beginning. Before you start doing any type of simulation or analysis, what do you have to do first, what information do you have to know? Your design probably has thousands of nets, are you going to simulate all of them?? Probably not, there’s not enough time for that and truthfully, it’s not really necessary. The first … Read More
If you do any kind of multi-gigabit SerDes design, you’ve probably come across the acronym, AMI - Algorithmic Modeling Interface. AMI is essential a fast behavioral model of multi-gigabit transmitters and receivers. Standard IBIS models are good for regular switching edges up to some surprisingly fast speeds, but when you start adding in things like pre-emphasis, and equalization on those edge, … Read More