Posted Jan 28, 2011, by Patrick Carrier
Many designers go to great lengths to make sure they do appropriate length-matching, even to the level of including the lengths of their terminators (resistors) in their routing. Although this seems like a way to be ultra-precise, it is actually being less precise. The reason is that the body length of a resistor is very small compared to the change in edge rate and thus real delay caused by the resistor.
For … Read More
Tags:
Constraints,
HyperLynx,
timing,
length match
Posted Jan 27, 2011, by Patrick Carrier
Yeah, that’s what I said. Vias are longer than their length. Phrased more appropriately, the delay introduced by a via has a lot more to it than just the length of the via. For starters, signals propagate through vias much differently than they propagate through traces. So trying to length match and include “via lengths” doesn’t make much sense in your layout. If you really … Read More
Tags:
Constraints,
HyperLynx,
vias,
timing
Posted Jan 25, 2011, by Patrick Carrier
Too often I see people just using straight length to manage their board timing. Or take it one step further and turn length into propagation delay.You know, 1 inch is about 166ps. Which is true, but nowhere near the complete picture for timing. If you think about it, the whole reason we have length constraints is to make sure data arrives at a certain time. That means that the signal switches above … Read More
Tags:
Constraints,
HyperLynx,
timing,
length matching
