High Speed Design Seminar and Social
There are currently no dates scheduled for this event.
Overview
Trilogic cordially invites you to attend a COMPLIMENTARY "Pads Social" focused on High Speed PCB Design including a one hour presentation on High Speed PCB Design techniques.
In today's environment, designers are facing new challenges. PCBs are increasing in design complexity and routing density. Designers need the tools to grow with the design challenges to meet these growing demands. At this event, you will learn how to maximize your design time, learn new techniques and increase both efficiency and quality of your designs using PADS.
Following the technical presentation we are hosting a "Social". With so much communication going through email and the web these days, there's not much chance to meet face to face! We'd like to provide a chance for you to "meet and greet" with the Trilogic and Mentor product experts in person in a relaxed and friendly atmosphere. Snacks and drinks will be provided AFTER the presentation. Seating is limited, so register now to reserve your space. We will send you an email to confirm your registration and attendance as well as provide directions.
About the Presenter
Mike Ashbaugh
Mike Ashbaugh is a Senior Applications Engineer for Trilogic. Over the past 14 years, Mike has been an applications engineer for several EDA companies, including Summit Design, Innoveda, and Mentor Graphics, where he's supported HDL, PCB and high-speed signal integrity tools. Mike also spent 10 years as a design engineer for NOAA (National Oceanic and Atmospheric Administration), designing the hardware for a variety of satellite ground receiving stations.
Who Should Attend
- Designers and engineers involved in high-speed PCB design -- particularly in rapid prototyping environments where time is of the essence
- Anyone concerned about high-speed design -- even if you're not a signal integrity expert
- Current PADS customers who want to learn about our newest release, PADS 9.2
- Design and Verification Engineers who can influence PCB constraints
What You Will Learn
Part one of the presentation begins with a discussion/demonstration on using a basic PADS tool set in designing to High Speed (HS) constraints . Measurement techniques, reports, etc. will be covered and you are encouraged to contribute some of your own ideas.
Part two continues with a discussion of the techniques that can be used with PADS ARS (Advanced Rule Set). This will include setting up and interactively routing to HS rules. Learn how to NOT "OVER" constrain your design. We ll also cover verifying that your design conforms to your predefined HS rules including the use of Spreadsheet. We will review how HS rules can influence/control your interactive routing when used with PADS Router HS and how to maximize the results you'll get when using PADS AutoRouter HS.
Part three will highlight new features included with PADS newest release, 9.2.
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