High Speed PCB Design and Analysis Seminar

Seminar
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Overview

Modern printed circuit boards pose two critical problems for Hardware and PCB designers:

A growing volume of high-speed interconnects as a percentage of the total system. Exponentially increasing design complexity associated with new bus and interconnect technologies like DDR, DDR2, PCI Express, HyperTransport, SATA, etc.

Secondly, Signal Integrity Analysis becomes a challenge for both the chip, board, and system designers. This session will discuss how effective high-speed software solutions must handle increasingly complex boards, as well as the increasing number of constraints that are required to ensure that boards work right the first time.

Through the use of real-world examples, a design constraint will be carried through the design process, from initial concept (design topology and driver exploration), through physical adherence (constraint-driven routing), and final full-board verification.

The presentation and demo will be based on constraint management, routing, and verification solutions within the Expedition Enterprise design flow. We will show how Expedition layouts seamlessly cross-linked to HyperLynx for Signal/Power Integrity Analysis.

About the Presenters

Presenter Image Dan McCarthy

Dan McCarthy has 39 years of multiple disciplines in the PCB Design arena.

This includes PCB layout, electro/mechanical design, library management, and defining corporate process flows. His past 22 years have been spent here at Mentor Graphics as a PCB Application Engineer with a focus on understanding and supporting the many needs of the ECAD and MCAD community here in Silicon Valley.

Presenter Image Cuong Nguyen

Cuong Nguyen has over 25 years of experience in Silicon Valley high tech companies including HP, Sun, LSI logic, and Cisco. He has many years of design experience in ASIC, FPGA, and board in various segments including computers, consumer, and networking. Prior to joining EDA Direct he held Field Application Engineering positions at Altera Inc and at Avnet supporting customers in the Bay area designing with Altera and Xilinx FPGAs.

Who Should Attend

  • PCB Layout
  • High Speed Design EngineersFPGA Design Engineers
 

What You Will Learn

  • Constraint management
  • Advanced constraint definition
  • High-speed rule definition
  • High-speed routing
  • ...and much more!

 

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