Mentor.com :: PCB Design Software & Tools Resources

News Article:Mentor Graphics and AT&S Announce Embedded Component Package (ECP) Technology Partnership to Optimize PCB Design-Through-Manufacturing Flow

Thu, 24 May 2012 13:00:00 GMT

WILSONVILLE, Ore., May 24, 2012—Mentor Graphics Corporation (NASDAQ: MENT), the market and technology leader in printed circuit board (PCB) design solutions, today announced the technology collaboration with the AT&S (Austria Technologie & Systemtechnik) Embedded Component Package (ECP®) process for Mentor Graphics® PCB design-through-manufacturing flow. AT&S’ advanced ECP technology for microelectronic component packaging leverages embedded bare die and discrete passives into the core of a PCB, reducing the package form factor by 30-50% for improved functionality and system performance. Now, with the Mentor® Expedition® Enterprise flow, designers are able to implement AT&S’s advanced technology on their PCB cores up to 40% faster and with improved quality than with previous design tools. As a result, PCB designers using ECP technology will realize improved electrical performance, thermal management, miniaturization, cost efficiency and overall product quality, with significant time reduction.

Blog Post:Need stitching vias?

Zhen Mu — Wed, 23 May 2012 16:57:10 GMT

When trying to design SERDES signals on board, designers often receive recommendations on placing stitching vias around differential signal vias of a channel. The purpose is to provide continuous return current path when signals switch layers, so that the discontinuity of trace impedance can be minimized. Because of the increasing board density, the issues designers are facing by following this recommendation

Event:Mentor Graphics Technology Day 2012

Tue, 22 May 2012 21:42:00 GMT

Join CDT and Mentor Graphics for a full day solutions flows from PCB, FPGA and Wire Harness to standards.

News Article:Professional Circuit Designs, Ltd. Standardizes on Mentor Graphics PCB Design-Through-Manufacturing Technologies for Design and Consulting Services

Wed, 16 May 2012 13:00:00 GMT

WILSONVILLE, Oregon, May 16th, 2012 – Mentor Graphics Corporation, (NASDAQ: MENT), the worldwide market and technology leader in printed circuit board (PCB) design-through-manufacturing software, today announced that Professional Circuit Designs (PCD), Ltd., based in Winchester, U.K. has standardized on the Mentor Graphics® PCB design-through-manufacturing product flow, including the Valor® NPI tool. PCD specializes in PCB place & route, schematic entry, pre- and post-layout of PCB signal integrity simulation, library development and now new product introduction (NPI) design checking for PCB manufacturing and assembly.

Blog Post:PADS Tips and Tricks: Pin Swapping

Jim Martens — Tue, 15 May 2012 08:44:03 GMT

This tip comes from Bill Tkachuk in CSD. Do you want to do pin swapping in a PADS Logic/PADS Layout flow? Take a look at Technote 575205 for the easy to follow steps to follow. Jim

White Paper:Understanding Via Effects

Tue, 08 May 2012 07:00:00 GMT

As the demand for fast computation and information transmission has increased dramatically in recent years, many designs have boards with signals operating in the multiple-Gbps range. Advanced memory designs are targeting over 10 Gbps data rates while the SERDES standard is moving toward 25-28 Gbps. With the signal speed changes come the new challenges of solving design issues never seen before. The electrical components of signal paths on boards and interconnects present problems, such as significant dielectric loss or impedance discontinuity from non-trace portion, which used to be ignored at lower signal speed. For a typical SERDES channel (Figure 1), the discontinuity contribution comes from the vias for signal switching layers, connectors enabling multi-board connections, and packages. To PCB designers, only via configurations are under their control in these discontinuity contributors.

Event:Stop Reinventing the Wheel, Start Using PCB Design Reuse

Tue, 08 May 2012 07:00:00 GMT

PCB design reuse helps you improve productivity. Learn about different kinds of design reuse and how to shorten your design cycle.

Blog Post:Turn off your phone!

Patrick Carrier — Thu, 03 May 2012 14:13:06 GMT

Everybody knows you are supposed to turn off your phone and other electronic devices when you are on a plane. You can leave it on during the flight, but it has to be off for takeoff and landing. I like to remind people in case they “forget”. I tend not to make a big deal during takeoff, but landing has me a little more on edge. The problem is coupled noise. Sure, most modern planes should

Blog Post:Is it SSN or is it Crosstalk?

Patrick Carrier — Wed, 02 May 2012 17:18:39 GMT

In the lab, both simultaneous switching noise (SSN) and crosstalk look the same. They appear as unwanted pulses of energy that line up with the (aggressor) signal edges. However, the mode of energy coupling is much different between SSN and crosstalk. In the case of crosstalk, they are lining up with the edges because the signal edges are coupling energy onto the victim signal through electric (and

Blog Post:Crosstalk is everywhere

Patrick Carrier — Tue, 01 May 2012 15:17:22 GMT

Crosstalk is everywhere. Really, in a more general sense, noise coupling is everywhere. Usually the method of noise coupling is traditional “crosstalk” – the unwanted transfer of noise from one place to another through coupled electric fields. This most often occurs on PCB designs with dense routing, and on wide parallel busses. Even on newer SERDES busses, however, it is still