Decrease PCB Time-To-Market with PADS Design For Test (DFT) Audit
On-demand Web Seminar
DFT Audit is a design-for-test option for PADS®. This embedded design for test (DFT) tool allows you to analyze, verify, and provide PCB test point coverage and reporting before releasing your PCB for fabrication. DFT Audit uses rules specifically developed for programming in-circuit test equipment, thus guaranteeing 100% testability for all nets on your board and helping to ensure accurate testability prior to fabrication. By cutting out needless prototypes, DFT Audit decreases time to market, improves design performance, and reduces cost.
We’ll explore the features of PADS Design for Test (DFT) Audit and how DFT Audit can be integrated into the PCB design flow quickly and easily to provide full PCB test point coverage within PADS.
What You Will Learn
- How to plan and incorporate test points as early as possible in the PCB design flow
- How test point coverage dramatically increases time-to-volume
- How PADS DFT Audit can optimize designs, improve time-to-market and contribute to lower costs
About the Presenter
John McMillan is a member of the PADS Technical Marketing team at Mentor Graphics. He has over 25 years of experience within the EDA industry, and his key focus areas have included Consultant for PADS Technical Marketing and Product Lead for Package and Symbol Productivity products.
Who Should View
- CAD managers with time and cost reduction objectives
- NPI engineers seeking to achieve first pass manufacturability
- PCB designers looking to easily and efficiently integrate test points into the PCB design
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