SERDES Design Solutions: Case Studies

Overview

Session Two: 6.25 Gbps Channel Analysis Case Studies

This session will walk you through two high speed serial channel case studies that will demonstrate how analysis in HyperLynx provides the essential knowledge of how a channel's physical characteristics affect its electrical performance. This knowledge empowers the designer to make appropriate design trade-offs. Appropriate trade-offs provide the opportunity to shorten the design cycle, reduce manufacturing cost while still providing conservative safety margins.

The first case study demonstrates how to quantify the performance degradation caused by replacing blind and buried or back-drilled vias with through-hole vias. Following these steps, the design engineer can make an informed decision whether they can omit the expense of back-drilling for their channel design.

The second case study demonstrates how to quantify the effect of length miss-matches in the individual traces that make up the differential high speed serial channel.  Following these steps, the design engineer can work with the layout engineer to decide if small deviations from trace length matching constraints are acceptable for their design.

Session one will introduce the advanced Multi-GHz analysis features in HyperLynx

What You Will Learn

• How to efficiently characterize the electrical performance of multi-Gbps channels in the frequency and time domains
• How to apply solution space analysis to make cost/performance trade-offs
• How to quantify the channel performance penalties incurred by introducing small asymmetries in its layout

Who Should View

• Electrical Engineers
• Engineering Managers
• Layout Designers