Opening Eyes on Fiber Weave and CAF
High Speed PCB Layout: Physical Design Issues of Highspeed Interfaces
Moore’s law, applied to data rates, has pushed PCB circuits so fast that the layout becomes part of the circuit. In designs such as DDR3 and PCIe, the fastest memory and high-speed serial performance...
Understanding Via Effects
As the demand for fast computation and information transmission has increased dramatically in recent years, many designs have boards with signals operating in the multiple-Gbps range. Advanced memory designs...
3D modeling methods in SERDES Designs: Is via behavior causing your SERDES designs to fail?
Learn how to evaluate vias through 3D EM Simulation and Post-Route Verification to validate via behavior and its effects on multi-gigabit channels.