PCB White Papers

John Park, Business Development Manager and Methodology Architect for Mentor’s System Design Division, discusses the growing interactions among IC, packaging and PCB design flows.

While all industries struggle with time-to-market pressures, this pressure is even more intense in the electronics industry. The speed at which technologies evolve and competitors either introduce new products that outdate others, or fast followers undercut profit margins, means the window for capturing market share for optimal revenue opportunities continues to decrease. Engineers need to be able to efficiently collaborate across the Printed Circuit Board (PCB) development team as well as other engineering disciplines. The complexity of PCB data combined with the rapid pace of changes means there is a lot of risk that data will become out of synch which will result in manufacturing delays and excess cost that ultimately means being late to market. This report offers guidance to help companies better manage their PCB design data so that they can improve engineering efficiency while maintaining data integrity to meet cost and quality targets.

We are faced with designing extremely high performing packages with mixed technology content such as high speed digital, analog, and RF. At the same time, the density requirements are forcing us to use 3D packaging technologies. Prototypes really are a relic of the past when it comes to packaging design. Early planning and evaluation, parasitic extraction simulation, and verification become more and more critical. In this article we will look at how to design modern 3D packages with mixed technology content with emphasis on chip-package-board co-design and package substrate design.

This paper discusses two major issues associated with channel crosstalk that have not been fully addressed previously: models from measurements and algorithms for BER prediction. It presents a practical solution that allows designers to add in “near-end” or “far-end” crosstalk characterized by a group of 4-port S-parameters, rather than to perform multiport parameter characterization. The paper then presents in details two simulation approaches for channel crosstalk: synchronous and asynchronous algorithms, and considers their implementations in time and statistical domains. Finally, it gives examples of the proposed procedures implemented together with IBIS-AMI buffer models and discusses their comparative advantages and limitations.

This paper has detailed a methodology illustrating how IBIS AMI models can be used in combination with Mentor’s analysis tools to attain very low BER level’s with a high level of confidence with relatively short analysis times. This new approach condenses the simulation time necessary to exhaust weakness that may be present within a HS SERDES link by orders of magnitude. The illustrated method periodically and systemically extracts and analyses the systems dynamic response to ever changing bit sequences to determine the next input pattern that will maximally “stress” the resulting eye. In of itself this process would result in pessimistic results that would generally be much worse than one would observe in hardware. This paper continued to the next step illustrating a method to associate the probability of a given worse case pattern with the results of that pattern allowing one to properly scale the resulting BER plot based on “real” and “valid” simulation events that were discovered by this “active” and “interrogative” method. This in contrast to other methods that attempt to extrapolate from what has simulate to that which has not been simulated merely based on an assumed distribution. Our approach has been validated against experimental data acquired using advanced transceivers designed and calibrated by TI. In addition to validating the method to predict a channels BER to low probability the excellent correlation between the results received by simulation and experimental data validates two other important aspects of the analysis flow: firstly it establishes the accuracy of TI’s IBIS AMI models and secondly Mentor’s ability to accurately generate time domain impulse responses from complex channels that can be used in conjunction with IBIS AMI models to accurately evaluate a links performance. The ability to quickly and accuracy predict a channels BER (to a low level) before a physical prototype exists unlocks the possibility for systems designers to perform solution space analysis ensuring that the design tradeoffs used during analysis will yield systems that perform at the target BER.

New to Signal Integrity analysis, or just need to brush up on the fundamentals? If so, this white paper is aimed at you. This white paper starts at the very basic, actually before the fundamentals, answering the question “What do I need to know?” The paper begins by identifying and analyzing critical nets. Next, it discusses transmission lines and the problems that arise from the high-frequency noise generated by rapid edge-rate signals. Finally, impedance is reviewed and discussed in the context of impedance and signal integrity.