Concept to FPGA to Board
There are currently no dates scheduled for this event
Overview
Cut design time and manufacturing costs while improving system performance and reducing PCB re-spins.
We'll show you how in this free seminar!
This seminar will cover all aspects of the design process, from HDL architectural specifications to PCB layout. We’ll explore new technologies for concurrent FPGA and PCB development that will ensure first-pass success and save one week’s design time for each FPGA on your board.
Time: 10:00 AM - 2:00 PM
Who Should Attend
- Hardware Engineers
- Signal Integrity Engineers
- PCB Designers
- Engineering Managers
- System Engineers
What You Will Learn
- Capture HDL design in VHDL/Verilog text or by using graphical entry
- Automatically generate bubble diagrams, flow charts from HDL code
- Simulate Verilog/VHDL using industry standard simulator like Modelsim PE or SE
- Synthesize HDL code using Precision synthesis into an FPGA device
- Automatically generate FPGA schematic symbol using DxDesigner tool
- Simulate high speed nets before routing your PCB using HyperLynx Ghz linesim
- Layout and Route your PCB with PADS and cross reference design back to DxDesigner
- Final simulation of the PCB using HyperLynx Ghz boardsim for fully routed board