Signal Integrity for Computer Peripherals Workshop Interest
Overview
Computing remains the largest single application for semiconductors today with a annual compounded growth rate of 11% per year according to CIBC reports. As these systems become denser and more complex, semiconductors must continue to increase in complexity in order to support bandwidth requirements. Capabilities such as on-die-termination for DDR2 interfaces and pre-emphasis and equalization used primarily for serial interfaces are very common. As a result, integrating these chips on PCBs becomes more challenging as routing becomes more dense.
To remain competitive, designers must be able to successfully implement these high-speed interfaces such as SATA I/II, PCI Express, DDR2 and USB 2.0 on PCBs in a timely manner. This means little or no board re-spins as well as a quick, accurate, and easy way to determine and validate PCB layout constraints in order to reduce design cycle time.
This workshop will provide hands-on exercises on key considerations for designing the above interfaces as well as some of the challenges designers face in implementing them. Workshop will also provide insight into designing 6 Gbps SATA as well as DDR3 interfaces which will soon be the dominant interfaces for storage and memory respectively.
Who Should Attend
- Engineers and managers involved in high-speed system design for computing applications - particularly in rapid prototyping environments where return on tool
investment is critical - Anyone concerned about high-speed design and particularly designing for
computing applications -- even if you're not a signal integrity expert - Current HyperLynx customers who want to learn about our newest release, v7.7
What You Will Learn
We'll show you how to get your boards done quickly and correctly, even if you don't have the time to learn overly-complex signal integrity software tools. In this workshop, you'll learn about:
- Key design considerations for designing high-speed interfaces for computer electronic applications. Examples of which are SATA I/II, PCI Express,
DDR2, DDR3 and USB 2.0 - How to drive routing constraints by verifying signal quality on high speed interfaces during floor planning.
- How to simulate high speed serial links to verify BER (bit error rate) performance.
- Simultaneous simulation with SPICE, S-parameter and IBIS models