RocketIO™ Design Kit for HyperLynx

Implement RocketIO multi-gigabit serial transceivers for Xilinx's Virtex-II Pro

As part of the serial, multi-gigabit trend, Xilinx Virtex-II Pro™ FPGAs with high-speed RocketIO™ serial transceivers are finding their way into hundreds of new applications. In an effort to make multi-gigabit interconnect implementation as painless as possible, Xilinx and Mentor Graphics have teamed up to provide the RocketIO™ Design Kit for HyperLynx. Pre-configured circuits in this design kit are ready to simulate for both typical chip-to-chip MGT applications and for PCB backplanes. There's no time wasted hunting for models, testing and correlating them, or figuring out how to configure ports. It has all been set up for you.

Important Links for the RocketIO Design Kit for HyperLynx

Xilinx Signal Integrity Simulation (SIS) Kit Details
The Xilinx SIS kit, and the associated RocketIO models are required in conjunction with the RocketIO for HyperLynx Design Kit. The SIS Kit includes four basic topologies that can be used as is, or edited in HyperLynx:

  • Chip-to-Chip
  • Chip-to-Chip with AC Coupling
  • Backplane
  • Backplane with AC Coupling

The default configuration for each of these is as follows: transmitter driver - package - 2" long FR4 trace - HSD5 AB pair connector - 16" long FR4 trace - HSD5 AB pair connector - 2" long FR4 trace - package - receiver buffer. The FR4 traces used are a differential pair of centered striplines, which are 12 mils wide and 20 mils apart, with a Z0O (odd mode characteristic impedance) of 50Ω.

RocketIO Design Kit for HyperLynx Contents
The RocketIO for HyperLynx Design Kit installs over the top of the Xilinx SIS Kit, and includes a full implementation of each of the SIS Kit examples, and a RocketIO for HyperLynx User Guide.

The figure below shows LineSim GHz simulation results for the Backplane example, which conforms to a XAUI backplane. The backplane example includes a transmitter driver on one chip to a receiver buffer on a different chip through FR4 traces and a Teradyne VHDM-HSD5 connector.


RocketIO XAUI backplane example in LineSim GHz

In LineSim GHz, you just point and click to change trace topology, add vias, or to change other aspects of the circuit.

HyperLynx makes HSPICE Simulation Easier than Ever
The models of the active RocketIO MGT circuitry are transistor-level silicon models that have been correlated by Xilinx to match both the actual silicon design and empirical data. This ensures that your system implementation is designed with the most advanced and accurate models available. Add to that fully coupled frequency-dependent lossy lines, and advanced via modeling, and you're ready to carefully characterize the signal integrity and degradation issues that are inherent in multi-gigabit design.

Using off-the-shelf HSPICE for signal-integrity simulation is a daunting task for most hardware engineers. Interconnect simulations are better performed in an environment like HyperLynx that's been built from the ground up for this purpose. HSPICE, on the other hand, is a general-purpose analog-simulation tool with a rather cryptic user interface, and a rugged learning curve, finding its niche primarily in integrated circuit design. Currently, due to limitations in IBIS, Xilinx has released models of its RocketIO™ buffers only in encrypted HSPICE format. HyperLynx GHz gives you the best of both worlds: rigorous transistor models, with unmatched ease-of-use.

Fortunately, the SPICELynx feature in HyperLynx GHz requires no detailed knowledge of the HSPICE user interface or SPICE netlists. RocketIO™ model assignment is made just like an IBIS assignment, with a user interface feature that makes "port mapping" in HSPICE easier than ever. Multi-bit stimulus patterns are then generated using the standard HyperLynx GHz stimulus editor. HyperLynx automatically generates the required SPICE netlists, including stimulus; runs HSPICE; parses the results and presents them in the HyperLynx oscilloscope-just as though the simulation had occurred natively in HyperLynx.

HyperLynx GHz Features

Complete Suite for Signal Integrity and EMC Analysis
With HyperLynx, you can address high-speed PCB problems throughout your design cycle, beginning at the earliest architectural stages and moving through post-layout verification. The emphasis is on solving problems early-where it is less costly and more efficient, and on getting results without spending weeks in training, and getting it right the first time, saving recurrent layout, prototype and test cycles in the lab. Hardware engineers, PCB designers, and signal integrity specialists alike can use HyperLynx EXT or GHz as a team-it's even easier than using an oscilloscope or spectrum analyzer in the lab.

Simulation of trace parameter variations (such as loss tangents, skin effect, dielectric constant, and other variations), crosstalk, jitter, and complex via effects are all included.

Stimulate your circuit with precoded 8b/10b pseudo-random bit sequence (PRBS) patterns to examine intersymbol interference (ISI) and study its effect on signal integrity. With the push of a button, you can plot the resulting waveform as an eye diagram so you can quickly quantify the signal degradation from transmitter to receiver.

HyperLynx in your High-Speed Design Flow
With both the HyperLynx software and MGT design kit in place, you're ready to exercise the advanced, high-speed design flow shown in Figure 2 to ensure your MGTs are implemented correctly.



HyperLynx in the high-speed PCB design flow

LineSim GHz™
Pre-layout simulation with LineSim GHz, part of HyperLynx GHz, allows you to predict and eliminate signal integrity problems early, allowing you to proactively constrain routing, plan stackups, and optimize clock and critical signal topologies, and terminations prior to board layout. LineSim's intuitive point-and-click transmission-line modeling approach is an ideal way to get it right the first time.

  • Simulate immediately, using industry-standard IBIS models, as well as a standard 7,000 model IC library, generic models, or by building your own models from databook information. Quickly enter complex interconnect scenarios, including ICs, transmission lines, connectors, and passive components.
  • Simulate with IBIS or HSPICE? models easier than ever.
  • Experiment with multiple layer configurations and automatically calculate impedance.
  • Model any combination of microstrip transmission lines, buried microstrips, striplines, cables, and connectors.
  • Analyze inter-symbol interference in multi-gigabit signals with multi-bit stimulus, jitter, eye diagrams, and eye masks to define keepout regions.
  • Accurate modeling of lossy transmission-line effects-including skin effect and dielectric loss.
  • Provides full analysis of differential pairs to achieve desired differential impedance, and to optimize differential termination.
  • Pre-layout crosstalk allows you to optimize trace spacing, stackup and termination as they relate to crosstalk effects prior to layout.
  • Visual IBIS Editor allows you to test and edit IBIS models-including a powerful V/I-V/t auto-correct option, and drag-and-drop curve correction.

BoardSim GHz™
Post-layout signal integrity simulation with BoardSim GHz, part of HyperLynx GHz, allows you to analyze signal integrity and timing at three important stages-following part placement in your PCB layout system, after critical net routing, and after detailed routing of an entire board.

  • Analyze inter-symbol interference for multi-gigabit signals with multi-bit stimulus, jitter, eye diagrams, and eye masks to define keepout regions.
  • Simulate with IBIS or HSPICE? models easier than ever.
  • Accurate modeling of lossy transmission-line effects-including skin effect and dielectric loss.
  • Advanced via modeling.
  • BoardSim's Board Wizard™ automatically scans large numbers of nets or an entire PCB in batch mode, flagging signal integrity and EMI hot spots.
  • Interactive analysis then takes you to the next level, simulating and trouble-shooting trouble spots that were identified during whole-board analysis.
  • Terminator Wizard™ recommends optimal termination values, eliminating tedious manual calculations.
  • Quick Terminators provides for real-time analysis, allowing new termination components to be inserted on-the-fly.
  • Full analysis of differential pairs, including differential impedance, and differential termination optimization with Terminator Wizard; differential simulation includes the effects of inter-pair crosstalk.
  • Accurately predicts crosstalk waveforms for any trace topology and IC placement, also showing board designers specific cross-sections in violation of crosstalk thresholds.
  • Powerful, easy to use multi-board analysis.
  • Exports to additional analysis environments, including ICX™, XTK™, ePlanner™, and HSPICE™.

EMC Analysis
HyperLynx's EMC analysis tools make it easy for hardware engineers to suppress EMC problems at their source, allowing EMC specialists to focus on system-level concerns, rather than emissions problems that could have been prevented easily at the board level.

  • Presents results in the frequency domain so engineers can easily recognize offending frequency bands.
  • The Spectrum Analyzer shows predicted radiation levels at every frequency to government or user-defined limits, including FCC, CISPR, and VCCI standard verification.
  • The Antenna Current Probe provides invaluable insight into the root cause of most EMC problems-excessive energy in critical nets on the PCB.
  • Analysis takes a fraction of the time, and is much more cost-effective than finding emission sources downstream in an anechoic chamber.

HyperLynx is compatible with PCB layout systems from:

  • Mentor Graphics PADS Layout, Expedition™, Board Station™
  • Cadence Allegro and SPECCTRA
  • Altium Protel and P-CAD
  • Yokogawa CADvance
  • Zuken CADSTAR, Visula and CR3000/5000 PWS

Click here to request additional multi-gigabit design kits from Mentor Graphics.
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