Addressing Integration Problems in a Complex FPGA/PCB/High-speed Design Environment Using the PADS Flow
Contributor: John Peloso, Application Engineer Consultant, Mentor Graphics Corporation
Format: PDF Document
The complexity of the PCB design flow now rivals the IC design process, with design teams facing a multitude of challenges across a variety of disciplines. In integrating FPGAs onto a printed circuit board, PCB designers need to swap pins on the FPGA, schematic designers need a quick means for creating high pin count FPGA symbols, FPGA designers need to pick the I/O standard that has minimal effect on the PCB, and so on.
With the enormous amount of critical data flowing between team members, the old methodology of manually sending a netlist over the wall to the PCB designer leaves too many open issues. It also creates a huge opportunity for errors to creep in, often with devastating effects on the end product.
This paper discusses how designers and engineers from all realms can work together as a team, using the specialized tools of the PADS® flow to automate, communicate, and complete each step in the process.