With the move to small geometries, existing fault models such as stuck-at, transition, bridging, open, and small-delay are becoming less effective at ensuring desired quality levels. While these models only consider faults on cell inputs/outputs and interconnect lines between cells, more defects increasingly occur within the cell structures. A new cell-aware test that directly targets specific shorts, opens, and transistor defects internal to each standard cell is now available. But you don’t have to be working at the leading-edge nodes to benefit. Silicon results across a large range of technology nodes, from 350nm to FinFETs, have shown significant additional defect detection beyond standard stuck-at and transition patterns when using Cell-Aware ATPG. To learn more, download a copy of our white paper, Tessent Cell-Aware Test, and see how you can improve defect detection in your test processes.
Can You Benefit from Cell-Aware Test?
More Blog Posts
- Testing the Boundaries of Good Design
- Making the Impossible -- Dealing with Patterns Throughout the Design and Manufacturing Flow
- Failing to Succeed
- Global Warming
- Won't You Please, Please Help Me?
- 3D Yoga
- Little Orphan Annie
- Esperanto for ICs
- Is your car safe to drive? Are you sure?
- Can You Benefit from Cell-Aware Test?
- August, 2014
- July, 2014
- March, 2014
- February, 2014
- January, 2014
- October, 2013
- May, 2013