Tessent Test Solutions

The Tessent Test Solutions product suite provides comprehensive silicon test and operations applications and IP that addresses the challenges of manufacturing test, debug, and yield ramp for today’s most complex SoCs.

Tessent SSN wins Siemens Innovator of the Year 2022

Tessent Streaming Scan Network (SSN) wins Siemens Innovator of the Year 2022 for Outstanding Invention. SSN enables chip designers to easily implement the silicon test architecture that drastically reduces silicon test time and test cost. Watch video to learn more.

White Paper

Streaming Scan Network: No-Compromise Packetized Test

The Tessent Streaming Scan Network (SSN) technology eliminates the difficult and costly trade-offs between test implementation effort and manufacturing test cost by decoupling core-level and chip-level DFT requirements.

Illustration of the bus-based architecture of Tessent Streaming Scan Network

Explore solution areas

Built on the foundation of the best-in-class solutions for each test discipline, Tessent logic and memory test product brings all the capabilities together in a powerful test flow that ensures total chip coverage.

The best of Tessent from ITC 2023

Access the ITC presentations from Tessent technologists, customers, and partners from this page. Along with its associated workshops and tutorials, ITC is the best place to discover new technologies for DFT, IC test, yield learning and in-life monitoring and analytics.