Mixed-Signal Test
The Tessent™ mixed-signal test solutions are vendor- and ATE-independent, addressing the growing number of SerDes interfaces and PLLs on today’s SoC designs. Characterization with PC plus GPIB-controlled benchtop equipment reduces tester hardware requirements, and the microWire-controlled clock conditioner PLL shortens your time-to-market. Tessent SerdesTest and Tessent PLLTest minimize tester hardware requirements and reduce tests costs.
Mixed-Signal Test Products
Tessent SerdesTest
Mentor Graphics Tessent SerdesTest provides complete, parametric, embedded test for multi-Gb/s SerDes. View Product Overview
Tessent SerdesTest
(PDF, 675kb) View Datasheet
Tessent PLLTest
Mentor Graphics Tessent PLLTest provides complete, parametric, embedded test for PLLs, DLLs, and clock signals. View Product Overview
Tessent PLLTest - Parametric Embedded Test for PLLs and DLLs
(PDF, 687kb) Automated Solution for PLL Test
Mentor Graphics Tessent® PLLTest provides complete, parametric, embedded test
for PLLs, DLLs, and clock signals. It can measure jitter,... View Datasheet
Tessent BoundaryScan
Mentor Graphics Tessent® BoundaryScan automates adding IEEE 1149.1 standard boundary scan support to ICs of any size or complexity. The boundary scan logic can be accessed throughout the life of the... View Product Overview
Tessent BoundaryScan - Comprehensive Boundary Scan and I/O Test
(PDF, 669kb) Mentor Graphics Tessent® BoundaryScan is a complete solution for the creation
and integration of boundary scan cells and related control logic for embedded test
and diagnosis of... View Datasheet
Datasheets
Toolbox
Tessent Training
We have training courses available for Tessent products in our training centers around the world, online, or at your site.
Contact Mentor Graphics
- Request Information or call toll free: 1-800-547-3000
Product Demos
Looking for a way to test the on-chip PLL in your design? This presentation describes the features and capabilities of Mentor Graphics built-in self-tests for on-chip measurement of PLL performance and... View Video
This presentation describes the features and capabilities of Mentor Graphics built-in self-tests for on-chip measurement of SerDes performance and just about any other IC timing. It performs the fastest... View Video
This product presentation describes the advantages of using Tessent BoundaryScan for managing both internal and external tests. This tool is compliant with IEEE standards 1149.1 and 1149.6 to provide extensive... View Video