In today’s ICs, memory commonly can take up more than 50% of the available silicon area. There is a growing need to make changes to the test algorithms during manufacturing test, and repairable memories are becoming more prevalent. This presentation discusses the challenges of memory test, and how the Mentor Graphics memory test solutions provide test as well as repair.
Recent technology nodes have each brought about new process challenges that introduced manufacturing defects which required new yield learning methods. This presentation takes a look back at the recent...…View Technology Overview
Steve Pateras talks to EDA Café about what's new and hot in test from Mentor.…View Technology Overview
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