In today’s ICs, memory commonly can take up more than 50% of the available silicon area. There is a growing need to make changes to the test algorithms during manufacturing test, and repairable memories are becoming more prevalent. This presentation discusses the challenges of memory test, and how the Mentor Graphics memory test solutions provide test as well as repair.
Steve Pateras talks to EDA Café about what's new and hot in test from Mentor.…View Technology Overview
Built on the foundation of the best-in-class test tools for each test discipline, Tessent® brings these solutions together in a powerful test platform that ensures total chip coverage.…View Technology Overview
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