Mentor Graphics support of ARM IP
/mentor2/images/player.swf
540
960
uuid=c596cf91-a1e7-4c80-954d-a461a95d0933&ischaptered=false&mgcbitrate=mgcvbitrate&id=flashreplace&image=/products/silicon-yield/multimedia/mentor-support-arm-ip/multimedia_image/arm.jpg&file=mp4s/silicon-arm1.mp4&streamer=rtmp%3A//mgraphics.fcod.llnwd.net/a3661/o33&autostart=false&skin=/mentor2/images/bright.swf
Description
This video is an overview of the partnership between ARM® and Tessent®, Mentor Graphics silicon test solutions product group. Tessent and ARM co-developed support for the ARM shared bus where MemoryBIST controllers reside outside of the ARM core, and utilize the shared bus to test the memory inside the core. Tessent and ARM also co-developed the "Mentor reference flow for ARM architecture" flow, available from Mentor Graphics. This provides a reusable, customizable, repeatable flow for customers using Tessent TestKompress® and ARM processor IP.
Details
Design Areas Silicon Test and Yield Analysis
Design Tasks Logic Test, Memory Test
Products Tessent MemoryBIST, Tessent TestKompress