Who Is Driving 3D IC and Why? - DAC 2011
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Description
While Moore's Law may be alive and well, it's certainly not cheap! Is the cost of IC scaling reaching a point of diminishing returns? With new 3D scaling alternatives such as Through Silicon Vias (TSV), does it make more sense to "go vertical" like real estate in Manhattan? This panel will host a discussion on the key issues surrounding 3D multi-die packaging, which affects everything from system design through IC implementation and testing. As 3D IC evolves over the next five years, what are the economic, performance, and power tradeoffs? Are we really ready for TSV in production? How will it affect the design, verification and testing flows? Plus many more questions that attends are sure to pose to the panelists.
Details
Design Areas IC Design
Design Tasks Design for Manufacturing