News & Press

Nov 11, 2011

Nov 4, 2011

ARM and Mentor Graphics Define Comprehensive Test Methodology for ARM-based Designs (Sep 19, 2011)
Mentor Graphics Adds User Defined Fault Models and Cell-Aware ATPG to Improve IC Test Quality (Sep 19, 2011)
Mentor Graphics and GLOBALFOUNDRIES Improve Yield Analysis with Combination of Tessent and Calibre Capabilities (Aug 29, 2011)
Mentor Graphics Mines Design and Test Data to Improve IC Yield and Failure Analysis (Jun 3, 2011)
Mentor Graphics Provides Calibre Verification and Tessent Test Solutions for 3D-IC in TSMC Reference Flow 12 (Jun 2, 2011)
Mentor Graphics Addresses 28nm and 3D-IC Requirements in TSMC Reference Flow 12 (Jun 2, 2011)
Mentor Graphics Outlines Strategy for 3D-IC Design, Verification and Testing (Mar 29, 2011)
Mentor Graphics Tessent YieldInsight Demonstrates Faster IC Failure and Yield Analysis at Fujitsu (Mar 18, 2011)

Semiconductor yield improvement with scan diagnosis (Nov 16, 2011)
Diagnosis-Driven Yield Analysis Improves Mature Yield (Nov 7, 2011)
Direct diagnosis for compressed ATPG patterns: A successful industrial experiment with layout-aware diagnosis (Oct 19, 2011)
How to test 3D chips (Sep 21, 2011)
A New Method to Accelerate the Yield Ramp - 2011 Tech Design Forum (Jul 15, 2011)
Scan diagnostic analysis assists SoC fab debug/process monitoring (Jul 15, 2011)
Controlling Power During IC Production Test (Jul 7, 2011)
EDACafe Interview with Steve Pateras at DAC 2011 3D TSV and Silicon Test (Jun 17, 2011)
A Guide to Power-Aware Memory Repair (May 24, 2011)
Ensuring High-Quality ICs (Apr 6, 2011)
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