News & Press

Jun 4, 2013

Nov 6, 2012

KALRAY Completes 256-processor, 28nm SoC Design Using Mentor Graphics Design and Test Tools (Oct 23, 2012)
TSMC Presents Two Partner of the Year Awards to Mentor Graphics for 20nm and 3D IC Design Flows (Oct 16, 2012)
Mentor Graphics Provides Design, Verification and Test Solutions for TSMC’s 20nm Design Infrastructure (Oct 15, 2012)
Mentor Graphics Provides Design, Verification, Thermal and Test Solutions for TSMC’s CoWoS Reference Flow (Oct 15, 2012)
Calibre Flow Developed with Mentor Graphics Consulting Boosts GLOBALFOUNDRIES Silicon Yield (Mar 8, 2012)
Mentor Graphics Receives TSMC’s Partner of the Year Award for 3D-IC Design Enablement (Nov 11, 2011)
Mentor Graphics Announces Completion of 20 nm Test Chip Tapeout with STMicroelectronics Using Olympus-SoC Place and Route System (Nov 4, 2011)
ARM and Mentor Graphics Define Comprehensive Test Methodology for ARM-based Designs (Sep 19, 2011)

Addressing new silicon challenges with Tessent IJTAG (Jun 5, 2013)
10 years, 100,000 miles, or <1 DPM (May 31, 2013)
Ensure FinFET defect coverage with cell-aware test (May 6, 2013)
Design and Manufacturing for Yield (May 6, 2013)
Boost DFT efficiency for large SoCs (Apr 23, 2013)
Optimizing autonomous IC test without sacrificing precision (Feb 26, 2013)
Use a smarter DFT tool environment for better design customization (Feb 5, 2013)
Mentor Snags Two Awards at DesignCon (Jan 29, 2013)
What's the difference between Scan ATPG and IJTAG Pattern Retargeting (Jan 22, 2013)
What's The Difference Between Scan ATPG And IJTAG Pattern Retargeting? (Jan 22, 2013)
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