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Tessent MemoryBIST

Tessent® MemoryBIST provides a complete solution for at-speed testing, diagnosis, and repair of embedded memories. The solution’s architecture is hierarchical, allowing BIST and self-repair capabilities to be added to individual cores as well as at the top level.

Tessent MemoryBIST includes a unique comprehensive automation flow that provides design rule checking, test planning, integration, and verification all at the RTL or gate level..

Features and Benefits

  • Fast self-test and self-repair IP integration, as well as reuse of embedded memory test inserted cores, shorten time-to-market.
  • Design-time algorithm programming allows for quality improvement and test time optimization.
  • Field algorithm programming provides full control of quality and test time trade-offs.
  • Built-in row- and column-based repair analysis reduces test time for repairable memories.
  • On-chip eFuse-based repair supports any third-party repairable SRAMs.
  • Supports any number of power domains distributed across any number of physical blocks.

Options

  • Tessent MemoryBIST Repair
  • Tessent MemoryBIST Field Programmable

Related

Tessent SiliconInsight®

All test capabilities created by Tessent MemoryBIST are fully supported by the Tessent SiliconInsight® interactive diagnostic tools. Tessent SiliconInsight

Tessent Training

We have training courses available for Tessent products in our training centers around the world, online, or at your site. Tessent training courses

 
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