The Tessent® SiliconInsight® solution provides an automated interactive environment for test bring-up, debug, and silicon characterization of devices containing Tessent BIST capabilities.
Tessent SiliconInsight can greatly increase productivity for chip designers and test engineers during silicon validation and debug, speeding time-to-market. Tessent SiliconInsight reduces test and silicon bring-up time with interactive debug and characterization for benchtop environments.
Features and Benefits
- Increase productivity during critical silicon validation and debug phases.
- Characterize the impact of test scheduling.
- Benchtop environment enables low-cost, high-availability characterization.
- Interactive capabilities for controlling, debugging, and characterizing BIST-tested memories, logic, PLLs, and SerDes.
- Execute tests and collect data for any selection and order of BIST-tested blocks on the device.
- Benchtop support through standard 1149.1 interface. Shmoo capability of power and clock through GPIB.